ZUSBOPTSC01ZAC datasheet(342/402 Pages) ZILOG

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PS024604-1005

P R E L I M I N A R Y

Appendix A—Register Tables

Z8 Encore!® Motor Control Flash MCUs

Product Specification

320

Hex Address: F25

PWM Fault Status Register (PWMFSTAT)

BITS

FIELD

RLDFlag Reserved DBGFLAG

Reserved

F1FLAG

C0FLAG

FFLAG

RESET

UUU

R/W

R/W1C

ADDR

F25H

Bit

Position

Value

(H)

Description

[7]

RLDFlag

Reload Flag

This bit is set and latched when a PWM timer reload occurs. Writing a 1 to this bit

clears the flag.

[6]

Reserved

Always reads 0.

[5]

DBGFLAG

Debug Flag

This bit is set and latched when DEBUG mode is entered. Writing a 1 to this bit

clears the flag.

[4:3]

Reserved

Always reads 0.

[2]

F1FLAG

Fault1 Flag

This bit is set and latched when Fault1 is asserted. Writing a 1 to this bit clears

the flag.

[1]

C0FLAG

Comparator 0 Flag

This bit is set and latched when Comparator is asserted. Writing a 1 to this bit

clears the flag.

[0]

FFLAG

Fault Flag

This bit is set and latched when the FAULT0 input is asserted. Writing a 1 to this

bit clears the flag.

Note: For this register, W1C means you must write one to clear the flag.

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