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ZUSBOPTSC01ZAC 数据表(PDF) 368 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 368 Page - Zilog, Inc. |
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368 / 402 page ![]() PS024604-1005 P R E L I M I N A R Y Appendix A—Register Tables Z8 Encore!® Motor Control Flash MCUs Product Specification 346 Hex Address: F76 Hex Addresses: F77–F85 Reserved ADC Clock Prescale Register (ADCCP) BITS 7 6 5 4 3 2 1 0 FIELD Reserved DIV16 DIV8 DIV4 DIV2 RESET 0 00 00 R/W R/W ADDR F76H Bit Position Value (H) Description [0] DIV2 0 DIV2 Clock is not divided 1 System Clock is divided by 2 for ADC Clock [1] DIV4 0 DIV4 Clock is not divided 1 System Clock is divided by 4 for ADC Clock [2] DIV8 0 DIV8 Clock is not divided 1 System Clock is divided by 8 for ADC Clock [3] DIV16 0 DIV16 Clock is not divided 1 System Clock is divided by 16 for ADC Clock [7:4] 0H Reserved - must be 0. |
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