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TUSB7340 数据表(PDF) 19 Page - Texas Instruments |
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TUSB7340 数据表(HTML) 19 Page - Texas Instruments |
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19 / 122 page ![]() The host controller implements a two-terminal serial interface with one clock signal (SCL) and one data signal (SDA). The SCL signal is an unidirectional output from the host controller and the SDA signal is bidirectional. Both are open-drain signals and require pullup resistors. The host controller is a bus controller device and drives SCL at approximately 60 kHz during data transfers and places SCL in a high-impedance state (0 frequency) during bus idle states. The serial EEPROM is a bus target device and must acknowledge a target address equal to A0h. Figure 6-2 illustrates an example application implementing the two-wire serial bus. SCL SDA VDD33 A0 A1 A2 SCL SDA TUSB73x0 Serial EEPROM Figure 6-2. Serial EEPROM Application 6.4.1.2 Serial-Bus Interface Protocol All data transfers are initiated by the serial-bus controller. The beginning of a data transfer is indicated by a start condition, which is signaled when the SDA line transitions to the low state while SCL is in the high state, as illustrated in Figure 6-3. The end of a requested data transfer is indicated by a stop condition, which is signaled by a low-to-high transition of SDA while SCL is in the high state, as shown in Figure 6-3. Data on SDA must remain stable during the high state of the SCL signal, as changes on the SDA signal during the high state of SCL are interpreted as control signals, that is, a start or stop condition. Figure 6-3. Serial-Bus Start and Stop Conditions and Bit Transfers Data is transferred serially in 8-bit bytes. During a data transfer operation, the exact number of bytes that are transmitted is unlimited. However, each byte must be followed by an acknowledge bit to continue the data transfer operation. An acknowledge (ACK) is indicated by the data byte receiver pulling the SDA signal low, so that it remains low during the high state of the SCL signal. Figure 6-4 illustrates the acknowledge protocol. www.ti.com TUSB7320, TUSB7340 SLLSE76Q – MARCH 2011 – REVISED MARCH 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TUSB7320 TUSB7340 |
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