TUSB7340 datasheet(32/122 Pages) TI2

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7.3.1.2 Power-Down Sequence

1. Assert PERST# to the device.

2. Remove the reference clock.

3. Remove the 3.3-V and 1.1-V voltages

See the power power-down sequencing diagram in Figure 7-17. If the VDD33_AUX terminal is to remain

powered after a system shutdown, then the host controller power-down sequence is exactly the same as shown

in Figure 7-17.

VDD11

VDDA_3P3

and VDD33

PCIE_REFCLK

PERST#

Figure 7-17. Power-Down Sequence

7.3.2 PCI Express Power Management

The TUSB73X0 includes the MSI-X Table and PBA in memory mapped register space (see Table 8-195). These

registers are accessible through the address programmed into the Base Address Register 2/3.

7.4 Layout

7.4.1 Layout Guidelines

7.4.1.1 High-Speed Differential Routing

The high-speed differential pair (USB_DM and USB_DP) is connected to a type A USB connecter. The

differential pair traces should be routed with 90 Ω ±15% differential impedance. The high-speed signal pair

should be trace length matched. Maximum trace length mismatch between high speed USB signal pairs should

be no greater than 150 mils. Keep total trace length to a minimum, if routing longer than six inches contact TI to

address signal integrity concerns. Route differential traces first.

Route the differential pairs on the top or bottom layers with the minimum amount of vias possible. No termination

or coupling caps are required. If a common mode choke is required then place the choke as close as possible

to the USB connector signal pins. Likewise ESD clamps should also be placed as close as possible to the USB

connector signal pins (closer than the choke).

For more detailed information, you may also see the USB 2.0 Board Design and Layout Guidelines which

describes general PCB design and layout guidelines for the USB 2.0 differential pair (DP/DM).

7.4.1.2 SuperSpeed Differential Routing

SuperSpeed consists of two differential routing pairs, a transmit pair (USB_SSTXM and USB_SSTXP) and a

receive pair (USB_SSRXM and USB_SSRXP). Each differential pair traces should be routed with 90 Ω ±15%

differential impedance. The high-speed signal pair should be trace length matched. Maximum trace length

mismatch between SuperSpeed USB signal pairs should be no greater than 5 mils. The total length for each

differential pair can be no longer than six inches, this is based on the SS USB compliance channel specification,

and should be avoided if at all possible. TI recommends that the SuperSpeed differential pairs be as short as

possible.

The transmit differential pair does not have to be the same length as the receive differential pair. Keep total trace

length to a minimum. Route differential traces first. Route the differential pairs on the top or bottom layers with

the minimum amount of vias possible. The transmitter differential pair requires 0.1-μF coupling capacitors for

TUSB7320, TUSB7340

SLLSE76Q – MARCH 2011 – REVISED MARCH 2024

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