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TUSB7340 数据表(PDF) 80 Page - Texas Instruments |
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TUSB7340 数据表(HTML) 80 Page - Texas Instruments |
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80 / 122 page ![]() Table 8-117. Bit Descriptions – Correctable Error Severity Register (continued) BIT FIELD NAME ACCESS DESCRIPTION 0 RX_ERROR(1) rcu Receiver Error. This bit is asserted when an 8b/10b error is detected by the PHY at any time. (1) This bit is reset by a PCI Express reset (PERST), a GRST, or the internally generated power-on-reset. TUSB7320, TUSB7340 SLLSE76Q – MARCH 2011 – REVISED MARCH 2024 www.ti.com 80 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TUSB7320 TUSB7340 |
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