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TUSB7340 数据表(PDF) 6 Page - Texas Instruments |
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TUSB7340 数据表(HTML) 6 Page - Texas Instruments |
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6 / 122 page ![]() Table 4-1. Clock and Reset Signals (continued) PIN TYPE DESCRIPTION NAME TUSB7320 TUSB7340 USB_SSTXP_DN2 A11 A11 O USB SuperSpeed transmitter differential pair (positive). Note: When routing, it is permissible to swap the positive and negative signals in Port 2 SSTX differential pair. USB_SSTXN_DN2 B10 B10 O USB SuperSpeed transmitter differential pair (negative). Note: When routing, it is permissible to swap the positive and negative signals in Port 2 SSTX differential pair. USB_SSRXP_DN2 B9 B9 I USB SuperSpeed receiver differential pair (positive). Note: When routing, it is permissible to swap the positive and negative signals in Port 2 SSRX differential pair. USB_SSRXN_DN2 A10 A10 I USB SuperSpeed receiver differential pair (negative). Note: When routing, it is permissible to swap the positive and negative signals in Port 2 SSRX differential pair. USB_DP_DN2 B12 B12 I/O USB High-speed differential transceiver (positive). USB_DM_DN2 A13 A13 I/O USB High-speed differential transceiver (negative). PWRON2# B34 B34 O PD USB DS Port 2 Power On Control for Downstream Power. The terminal is used for control of the downstream power switch. If the PWRON_POLARITY bit is set to 1, this pin is active high and the internal pull-down is disabled. This pin may be at low impedance when power rails are removed. OVERCUR2# A37 A37 I PU USB DS Port 2 Overcurrent Detection. 0: overcurrent detected; 1: overcurrent not detected USB_SSTXP_DN3 — B28 O USB SuperSpeed transmitter differential pair (positive). Note: When routing, it is permissible to swap the positive and negative signals in Port 3 SSTX differential pair. USB_SSTXN_DN3 — A30 O USB SuperSpeed transmitter differential pair (negative). Note: When routing, it is permissible to swap the positive and negative signals in Port 3 SSTX differential pair. USB_SSRXP_DN3 — B27 I USB SuperSpeed receiver differential pair (positive). Note: When routing, it is permissible to swap the positive and negative signals in Port 3 SSRX differential pair. USB_SSRXN_DN3 — A29 I USB SuperSpeed receiver differential pair (negative). Note: When routing, it is permissible to swap the positive and negative signals in Port 3 SSRX differential pair. USB_DP_DN3 — B25 I/O USB High-speed differential transceiver (positive). USB_DM_DN3 — A27 I/O USB High-speed differential transceiver (negative). PWRON3# — A46 O PD USB DS Port 3 Power On Control for Downstream Power. The terminal is used for control of the downstream power switch. If the PWRON_POLARITY bit is set to 1, this pin is active high and the internal pull-down is disabled. This pin may be at low impedance when power rails are removed. OVERCUR3# — B43 I PU USB DS Port 3 Overcurrent Detection. 0: overcurrent detected; 1: overcurrent not detected USB_SSTXP_DN4 — B7 O USB SuperSpeed transmitter differential pair (positive). Note: When routing, it is permissible to swap the positive and negative signals in Port 4 SSTX differential pair. USB_SSTXN_DN4 — A8 O USB SuperSpeed transmitter differential pair (negative). Note: When routing, it is permissible to swap the positive and negative signals in Port 4 SSTX differential pair. USB_SSRXP_DN4 — B6 I USB SuperSpeed receiver differential pair (positive). Note: When routing, it is permissible to swap the positive and negative signals in Port 4 SSRX differential pair. USB_SSRXN_DN4 — A7 I USB SuperSpeed receiver differential pair (negative). Note: When routing, it is permissible to swap the positive and negative signals in Port 4 SSRX differential pair. USB_DP_DN4 — B5 I/O USB High-speed differential transceiver (positive). USB_DM_DN4 — A5 I/O USB High-speed differential transceiver (negative). TUSB7320, TUSB7340 SLLSE76Q – MARCH 2011 – REVISED MARCH 2024 www.ti.com 6 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TUSB7320 TUSB7340 |
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