TUSB7340 datasheet(20/122 Pages) TI2

20 / 122 page

SCL From

Controller

SDA Output

By Transmitter

SDA Output

By Receiver

Figure 6-4. Serial-Bus Protocol Acknowledge

The host controller performs three basic serial-bus operations: single byte reads, single byte writes, and

multibyte reads. The single byte operations occur under software control. The multibyte read operations are

performed by the serial EEPROM initialization circuitry immediately after a PCI Express reset. See TUSB7340

Power Consumption, Serial-Bus EEPROM Application, for details on how the host controller automatically loads

the subsystem identification and other register defaults from the serial-bus EEPROM.

Figure 6-5 illustrates a single byte write. The host controller issues a start condition and sends the 7-bit target

device address and the R/W command bit is equal to 0b. A 0b in the R/W command bit indicates that the data

transfer is a write. The target device acknowledges if it recognizes the target address. If no acknowledgment

is received by the host controller, then bit 1 (SB_ERR) is set in the serial-bus control and status register (PCI

offset BCh, see Serial Bus Control and Status Register). Next, the EEPROM word address is sent by the host

controller, and another target acknowledgment is expected. Then the host controller delivers the data byte MSB

first and expects a final acknowledgment before issuing the stop condition.

Figure 6-5. Serial-Bus Protocol – Byte Write

Figure 6-6 illustrates a single byte read. The host controller issues a start condition and sends the 7-bit

target device address and the R/W command bit is equal to 0b (write). The target device acknowledges if it

recognizes the target address. Next, the EEPROM word address is sent by the host controller, and another

target acknowledgment is expected. Then, the host controller issues a restart condition followed by the 7-bit

target address and the R/W command bit is equal to 1b (read). Once again, the target device responds with an

acknowledge. Next, the target device sends the 8-bit data byte, MSB first. Because this is a 1-byte read, the

host controller responds with no acknowledge (logic high) indicating the last data byte. Finally, the host controller

issues a stop condition.

Figure 6-6. Serial-Bus Protocol – Byte Read

TUSB7320, TUSB7340

SLLSE76Q – MARCH 2011 – REVISED MARCH 2024

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TUSB7340 数据表(PDF) 20 Page - Texas Instruments