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TUSB7340 数据表(PDF) 56 Page - Texas Instruments |
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TUSB7340 数据表(HTML) 56 Page - Texas Instruments |
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56 / 122 page ![]() 8.1.41 Device Status Register The Device Status Register controls PCI Express device specific parameters. PCI register offset: 7Ah Register type: Read Only, Clear by a Write of One, Hardware Update Default value: 00x0h Table 8-57. PCI Register 7Ah Bit No. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset State 0 0 0 0 0 0 0 0 0 0 0 x 0 0 0 0 Table 8-58. Device Status Register Description BIT FIELD NAME ACCESS DESCRIPTION 15:6 RSVD r Reserved. Return zeros when read. 5 PEND ru Transaction Pending. 4 APD ru AUX Power Detected. This bit indicates that AUX power is present. 0 – No AUX power detected. (AUX_DET pin is 0) 1 – AUX power detected. (AUX_DET pin is 1) This bit is set based upon the state of the AUX_DET pin. 3 URD rcu Unsupported Request Detected. 2 FED rcu Fatal Error Detected. 1 NFED rcu Non-Fatal Error Detected. 0 CED rcu Correctable Error Detected. 8.1.42 Link Capabilities Register The Link Capabilities Register indicates the link specific capabilities of the TUSB73X0. PCI register offset: 7Ch Register type: Read-only Default value: 0007 xC12h Table 8-59. PCI Register 7Ch Bit No. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reset State 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 Bit No. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset State 0 x x 1 1 1 0 0 0 0 0 1 0 0 1 0 Table 8-60. Link Capabilities Register Description BIT FIELD NAME ACCESS DESCRIPTION 31:24 PORT_NUM r Port Number. This field indicates port number for the PCI Express link. This field is read only 00h indicating that the Link is associated with port zero. 23:19 RSVD r Reserved. Returns zeros when read. 18 CLK_PM r Clock Power Management. This bit is hardwired to 1 to indicate that the TUSB73X0 supports Clock Power Management through the CLKREQ# protocol. TUSB7320, TUSB7340 SLLSE76Q – MARCH 2011 – REVISED MARCH 2024 www.ti.com 56 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TUSB7320 TUSB7340 |
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