| 数据搜索系统,热门电子元器件搜索 |
|
PSD834210MIT 数据表(PDF) 81 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
PSD834210MIT 数据表(HTML) 81 Page - STMicroelectronics |
|
81 / 89 page ![]() 81/89 PSD834F2V Figure 46. ISC Timing Table 55. Power-down Timing Note: 1. tCLCL is the period of CLKIN (PD1). Symbol Parameter Conditions -10 -15 -20 Unit Min Max Min Max Min Max tLVDV ALE Access Time from Power-down 145 150 200 ns tCLWH Maximum Delay from APD Enable to Internal PDN Valid Signal Using CLKIN (PD1) 15 * tCLCL 1 µs ISCCH TCK TDI/TMS ISC OUTPUTS/TDO ISC OUTPUTS/TDO t ISCCL t ISCPH t ISCPSU t ISCPVZ t ISCPZV t ISCPCO t AI02865 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |