PSD834210MIT datasheet(19/89 Pages) STMICROELECTRONICS

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PSD834F2V

Programming Flash Memory

Flash memory must be erased prior to being pro-

grammed. A byte of Flash memory is erased to all

1s (FFh), and is programmed by setting selected

bits to 0. The MCU may erase Flash memory all at

once or by-sector, but not byte-by-byte. However,

the MCU may program Flash memory byte-by-

byte.

The primary and secondary Flash memories re-

quire the MCU to send an instruction to program a

byte or to erase sectors (see Table 7).

Once the MCU issues a Flash memory Program or

Erase instruction, it must check for the status bits

for completion. The embedded algorithms that are

invoked inside the PSD support several means to

provide status to the MCU. Status may be checked

using any of three methods: Data Polling, Data

Toggle, or Ready/Busy (PC3).

Data Polling. Polling on the Data Polling Flag

(DQ7) bit is a method of checking whether a Pro-

gram or Erase cycle is in progress or has complet-

ed. Figure 4 shows the Data Polling algorithm.

When the MCU issues a Program instruction, the

embedded algorithm within the PSD begins. The

MCU then reads the location of the byte to be pro-

grammed in Flash memory to check status. The

Data Polling Flag (DQ7) bit of this location be-

comes the complement of b7 of the original data

byte to be programmed. The MCU continues to

poll this location, comparing the Data Polling Flag

(DQ7) bit and monitoring the Error Flag (DQ5) bit.

When the Data Polling Flag (DQ7) bit matches b7

of the original data, and the Error Flag (DQ5) bit

remains 0, the embedded algorithm is complete. If

the Error Flag (DQ5) bit is 1, the MCU should test

the Data Polling Flag (DQ7) bit again since the

Data Polling Flag (DQ7) bit may have changed si-

multaneously with the Error Flag (DQ5) bit (see

Figure 4).

The Error Flag (DQ5) bit is set if either an internal

time-out occurred while the embedded algorithm

attempted to program the byte or if the MCU at-

tempted to program a 1 to a bit that was not erased

(not erased is logic 0).

It is suggested (as with all Flash memories) to read

the location again after the embedded program-

ming algorithm has completed, to compare the

byte that was written to the Flash memory with the

byte that was intended to be written.

When using the Data Polling method during an

Erase cycle, Figure 4 still applies. However, the

Data Polling Flag (DQ7) bit is 0 until the Erase cy-

cle is complete. A 1 on the Error Flag (DQ5) bit in-

dicates a time-out condition on the Erase cycle; a

0 indicates no error. The MCU can read any loca-

tion within the sector being erased to get the Data

Polling Flag (DQ7) bit and the Error Flag (DQ5) bit.

PSDsoft Express generates ANSI C code func-

tions which implement these Data Polling algo-

rithms.

Figure 4. Data Polling Flowchart

Data Toggle. Checking the Toggle Flag (DQ6) bit

is a method of determining whether a Program or

Erase cycle is in progress or has completed. Fig-

ure 5 shows the Data Toggle algorithm.

When the MCU issues a Program instruction, the

embedded algorithm within the PSD begins. The

MCU then reads the location of the byte to be pro-

grammed in Flash memory to check status. The

Toggle Flag (DQ6) bit of this location toggles each

time the MCU reads this location until the embed-

ded algorithm is complete. The MCU continues to

read this location, checking the Toggle Flag (DQ6)

bit and monitoring the Error Flag (DQ5) bit. When

the Toggle Flag (DQ6) bit stops toggling (two con-

secutive reads yield the same value), and the Er-

ror Flag (DQ5) bit remains 0, the embedded

algorithm is complete. If the Error Flag (DQ5) bit is

1, the MCU should test the Toggle Flag (DQ6) bit

again, since the Toggle Flag (DQ6) bit may have

changed simultaneously with the Error Flag (DQ5)

bit (see Figure 5).

READ DQ5 & DQ7

at VALID ADDRESS

START

READ DQ7

FAIL

PASS

AI01369B

DQ7

DATA

YES

DQ5

= 1

DQ7

DATA

YES

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