PSD834210MIT datasheet(34/89 Pages) STMICROELECTRONICS

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The OMC Mask Register. There is one Mask

Macrocells (OMC). The Mask Registers can be

used to block the loading of data to individual Out-

put Macrocells (OMC). The default value for the

Mask Registers is 00h, which allows loading of the

Output Macrocells (OMC). When a given bit in a

Mask Register is set to a 1, the MCU is blocked

from writing to the associated Output Macrocells

(OMC).

For

example,

suppose

McellAB0-

McellAB3 are being used for a state machine. You

would not want a MCU write to McellAB to over-

write the state machine registers. Therefore, you

would want to load the Mask Register for McellAB

(Mask Macrocell AB) with the value 0Fh.

The Output Enable of the OMC. The

Output

Macrocells (OMC) block can be connected to an I/

O port pin as a PLD output. The output enable of

each port pin driver is controlled by a single prod-

uct term from the AND Array, ORed with the Direc-

tion Register output. The pin is enabled upon

Power-up if no output enable equation is defined

and if the pin is declared as a PLD output in PSD-

soft Express.

If the Output Macrocell (OMC) output is declared

as an internal node and not as a port pin output in

the PSDabel file, the port pin can be used for other

I/O functions. The internal node feedback can be

routed as an input to the AND Array.

Input Macrocells (IMC)

The CPLD has 24 Input Macrocells (IMC), one for

each pin on Ports A, B, and C. The architecture of

the Input Macrocells (IMC) is shown in Figure 14.

The Input Macrocells (IMC) are individually config-

urable, and can be used as a latch, register, or to

pass incoming Port signals prior to driving them

onto the PLD input bus. The outputs of the Input

Macrocells (IMC) can be read by the MCU through

the internal data bus.

The enable for the latch and clock for the register

are driven by a multiplexer whose inputs are a

product term from the CPLD AND Array or the

MCU Address Strobe (ALE/AS). Each product

term output is used to latch or clock four Input

Macrocells (IMC). Port inputs 3-0 can be con-

trolled by one product term and 7-4 by another.

Configurations for the Input Macrocells (IMC) are

specified by equations written in PSDabel (see Ap-

plication Note

AN1171). Outputs of the Input Mac-

rocells (IMC) can be read by the MCU via the IMC

buffer. See the section entitled “I/O Ports”, on

page 45.

Input Macrocells (IMC) can use Address Strobe

(ALE/AS, PD0) to latch address bits higher than

A15. Any latched addresses are routed to the

PLDs as inputs.

Input Macrocells (IMC) are particularly useful with

handshaking communication applications where

two processors pass data back and forth through

a common mailbox. Figure 15 shows a typical con-

figuration where the Master MCU writes to the Port

A Data Out Register. This, in turn, can be read by

the Slave MCU via the activation of the “Slave-

Read” output enable product term.

The Slave can also write to the Port A Input Mac-

rocells (IMC) and the Master can then read the In-

put Macrocells (IMC) directly.

Note that the “Slave-Read” and “Slave-Wr” signals

are product terms that are derived from the Slave

MCU inputs Read Strobe (RD, CNTL1), Write

Strobe (WR, CNTL0), and Slave_CS.

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