ST10F280 datasheet(68/186 Pages) STMICROELECTRONICS

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ST10F280

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11.2.3 - Interrupt Request Generation

Each of the four channels of the XPWM module can generate an individual interrupt request. Each of

these “channel interrupts” can activate the common “module interrupt”, which actually interrupts the CPU.

This common module interrupt is controlled by the XPWM Module Interrupt Control register XP2IC( Xpe-

ripherals 2 control register). The interrupt service routine can determine the active channel interrupt(s)

from the channel specific interrupt request flags PIRx in register XPWMCON0. The interrupt request flag

PIRx of a channel is set at the beginning of a new PWM cycle, i.e. upon loading the shadow registers.

This indicates that registers XPPx and XPWx are now ready to receive a new value. If a channel interrupt

is enabled via its respective PIEx bit, also the common interrupt request flag XP2IR in register XP2IC is

set, provided that it is enabled via the common interrupt enable bit XP2IE.

Note: The channel interrupt request flags (PIRx in register XPWMCON0) are not automatically cleared

by hardware upon entry into the interrupt service routine, so they must be cleared via software.

The module interrupt request flag XP2IR is cleared by hardware upon entry into the service

routine, regardless of how many channel interrupts were active. However, it will be set again if

during execution of the service routine a new channel interrupt request is generated.

XP2IC (F196h / CBh)

ESFR

Reset Value: - - 00h

Note: Refer to the general Interrupt Control Register description for an explanation of the control fields.

11.2.4 - XPWM Output Signals

The output signals of the four XPWM channels are XPWM3...XPWM0. The output signal of each PWM

channel is individually enabled by control bit PENx in register XPWMCON1.

The XPWM signals are XORed with the outputs of the register XPOLAR(3...0) before being driven to the

output pins. This allows driving the XPWM signal directly to the output pin (XPOLAR.x=’0’) or driving the

inverted XPWM signal (XPOLAR.x=’1’).

543210

---

XP2IR XP2IE

ILVL

GLVL

Figure 24 : XPWM Output Signal Generation

Latch XPOLAR.3

PWM 3

Pin XPWM3

Latch XPOLAR.2

PWM 2

Pin XPWM2

Latch XPOLAR.1

PWM 1

Pin XPWM1

Latch XPOLAR.0

PWM 0

Pin XPWM0

XPWMCON1.PEN3

XPWMCON1.PEN2

XPWMCON1.PEN0

XPWMCON1.PEN1

XPWMCON1.PB01

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