ST10F280 datasheet(21/186 Pages) STMICROELECTRONICS

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ST10F280

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5 - INTERNAL FLASH MEMORY

5.1 - Overview

– 512K Byte on-chip Flash memory

– Two possibilities of Flash mapping into the CPU

address space

– Flash memory can be used for code and data

storage

– 32-bit, zero waitstate read access (50ns cycle

time at fCPU = 40MHz)

– Erase-Program Controller (EPC) similar to

M29F400B STM’s stand-alone Flash memory

• Word-by-Word Programmable (16

µs typical)

• Data polling and Toggle Protocol for EPC

Status

• Internal Power-On detection circuit

– Memory Erase in blocks

• One 16K Byte, two 8K Byte, one 32K Byte,

seven 64K Byte blocks

• Each

block

can

erased

separately

(1.5 second typical)

• Chip erase (8.5 second typical)

• Each block can be separately protected

against programming and erasing

• Each protected block can be temporary unpro-

tected

• When enabled, the read protection prevents

access to data in Flash memory using a pro-

gram running out of the Flash memory space.

Access to data of internal Flash can only be per-

formed with an inner protected program

– Erase Suspend and Resume Modes

• Read and Program another Block during erase

suspend

– Single Voltage operation , no need of dedicated

supply pin

– Low Power Consumption:

• 45mA max. Read current

• 60mA max. Program or Erase current

• Automatic Stand-by-mode (50

µA maximum)

– 100,000

Erase-Program

Cycles

per

block,

20 year data retention time

– Operating temperature: -40 to +125oC

5.2 - Operational Overview

Read Mode

In standard mode (the normal operating mode)

the Flash appears like an on-chip ROM with the

same timing and functionality. The Flash module

offers a fast access time, allowing zero waitstate

access with CPU frequency up to 40MHz.

Instruction fetches and data operand reads are

performed with all addressing modes of the

ST10F280 instruction set.

In order to optimize the programming time of the

internal Flash, blocks of 8K Bytes, 16K Bytes,

32K Bytes, 64K Bytes can be used. But the size of

the blocks does not apply to the whole memory

space, see details in Table 2.

Table 2 : 512K Byte Flash Memory Block Organisation

Block

Addresses (Segment 0)

Addresses (Segment 1)

Size (K Byte)

00’0000h to 00’3FFFh

00’4000h to 00’5FFFh

00’6000h to 00’7FFFh

01’8000h to 01’FFFFh

02’0000h to 02’FFFFh

03’0000h to 03’FFFFh

04’0000h to 04’FFFFh

05’0000h to 05’FFFFh

06’0000h to 06’FFFFh

07’0000h to 07’FFFFh

08’0000h to 08’FFFFh

01’0000h to 01’3FFFh

01’4000h to 01’5FFFh

01’6000h to 01’7FFFh

01’8000h to 01’FFFFh

02’0000h to 02’FFFFh

03’0000h to 03’FFFFh

04’0000h to 04’FFFFh

05’0000h to 05’FFFFh

06’0000h to 06’FFFFh

07’0000h to 07’FFFFh

08’0000h to 08’FFFFh

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