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ST10F280 数据表(PDF) 31 Page - STMicroelectronics

部件名 ST10F280
功能描述  16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM
PDF  186 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST10F280 数据表(HTML) 31 Page - STMicroelectronics

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5.5.3 - Programming Examples
Most of the microcontroller programs are written in the C language where the data page pointers are
automatically set by the compiler. But because the C compiler may use the not allowed direct addressing
mode for Flash write addresses, it is necessary to program the organisational Flash accesses (command
sequences) with assembler in-line routines which use indirect addressing.
Example 1 Performing the command Read/Reset
We assume that in the initialization phase the lowest 32K Bytes of Flash memory (sector 0) have been
mapped to segment 1.
According to the usual way of ST10 data addressing with data page pointers, address bit A15 and A14 of
a 16-bit command write address select the data page pointer (DPP) which contains the upper 10-bit for
building the 24-bit physical data address. Address bit A13...A0 represent the address offset. As the bit
A14...A18 are "don’t care" when written a Flash command in the Command Interface (CI), we can choose
the most conveniant DPPx register for address handling.
The following examples are making usage of DPP0. We just have to make sure, that DPP0 points to
active Flash memory space.
To be independent of mapping of sector 0 we choose for all DPPs which are used for Flash address
handling, to point to segment 2.
For this reason we load DPP0 with value 08h (00 0000 l000b).
MOV
R5, #01554h
;load auxilary register R5 with command address
;(used in command cycle 1)
MOV
R6, #02AA8h
;load auxilary register R6 with command address
;(used in command cycle 2)
SCXT
DPPO, #08h
;push data page pointer 0 and load it to point to
;segment 2
MOV
R7, #0A8h
;load register R7 with 1st CI enable command
MOV
[R5], R7
;command cycle 1
MOV
R7, #054h
;load register R7 with 2cd CI enable command
MOV
[R6], R7
;command cycle 2
MOV
R7, #0F0h
;load register R7 with Read/Reset command
MOV
[R5], R7
;command cycle 3. Address is don’t care
POP
DPP0
;restore DPP0 value
In the example above the 16-bit registers R5 and R6 are used as auxilary registers for indirect
addressing.
Example 2 Performing a Program Word command
We assume that in the initialization phase the lowest 32K Bytes of Flash memory (sector 0) have been
mapped to segment 1.The data to be written is loaded in register R13, the address to be programmed is
loaded in register R11/R12 (segment number in R11, segment offset in R12).
MOV
R5, #01554h
;load auxilary register R5 with command address
;(used in command cycle 1)
MOV
R6, #02AA8h
;load auxilary register R6 with command address
;(used in command cycle 2)
SXCT
DPPO, #08h
;push data page pointer 0 and load it to point to
;segment 2
MOV
R7, #0A8h
;load register R7 with 1st CI enable command
MOV
[R5], R7
;command cycle 1
MOV
R7, #054h
;load register R7 with 2cd CI enable command
MOV
[R6], R7
;command cycle 2
MOV
R7, #0A0h
;load register R7 with Program Word command
MOV
[R5], R7
;command cycle 3



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