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数据搜索系统，热门电子元器件搜索 |
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ST10F280 数据表(PDF) 100 Page - STMicroelectronics |
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ST10F280 数据表(HTML) 100 Page - STMicroelectronics |
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100 / 186 page  ST10F280 100/186 The port structures of Port 8 differ in the way the output latches are connected to the internal bus and to the pin driver (see the Figure 50). Pins P8.7...P8.0 (CC23IO...CC16IO) combine internal bus data and alternate data output before the port latch input, as do the Port 2 pins. Figure 49 : Port 8 I/O and Alternate Functions Figure 50 : Block Diagram of Port 8 Pins P8.7...P8.0 Port 8 Alternate Function General Purpose Input / Output P8.7 P8.6 P8.5 P8.4 P8.3 P8.2 P8.1 P8.0 CC23IO CC22IO CC21IO CC20IO CC19IO CC18IO CC17IO CC16IO Open Drain Latch Write 0DP8.y Read 0DP8.y Direction Latch Write DP8.y Read DP8.y MUX 0 1 Alternate Latch Data Input Input Latch CPU Clock P8.y CCzIO Output Buffer Alternate Data Output MUX 0 1 Output Latch ≥ 1 Write Port P8.y Compare Trigger Read P8.y y = (7...0) z = (16...23) Alternate Pin Data Input |
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