ST10F280 datasheet(80/186 Pages) STMICROELECTRONICS

80 / 186 page

ST10F280

80/186

While an external bus mode is enabled, the user software should not write to the port output latch, other-

wise unpredictable results may occur. When the external bus modes are disabled, the contents of the

direction register last written by the user becomes active.

The figure below shows the structure of a PORT1 pin.

12.4 - Port 2

If this 16-bit port is used for general purpose I/O, the direction of each line can be configured via the cor-

responding direction register DP2. Each port line can be switched into push/pull or open drain mode via

the open drain control register ODP2.

Figure 31 : PORT1 I/O and Alternate Functions

Figure 32 : Block Diagram of a PORT1 Pin

PORT1

P1H

P1L

Alternate Function

General Purpose Input/Output

8/16-bit Demultiplexed Bus

CAPCOM2 Capture Inputs

P1H.7

P1H.6

P1H.5

P1H.4

P1H.3

P1H.2

P1H.1

P1H.0

P1L.7

P1L.6

P1L.5

P1L.4

P1L.3

P1L.2

P1L.1

P1L.0

A15

A14

A13

A12

A11

A10

CC27I

CC26I

CC25I

CC24I

Direction

Latch

Write DP1H.y / DP1L.y

Read DP1H.y / DP1L.y

Port Output

Latch

Write P1H.y / P1L.y

Read P1H.y / P1L.y

MUX

“1”

Input

Latch

P1H.y

P1L.y

Output

Buffer

y = 7...0

Alternate

Function

Enable

Port Data

Output

Alternate

Data

Output

CPU Clock

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