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ST10F280 数据表(PDF) 1 Page - STMicroelectronics |
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ST10F280 数据表(HTML) 1 Page - STMicroelectronics |
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1 / 186 page ![]() 1/186 ST10F280 March 2003 s HIGH PERFORMANCE CPU WITH DSP FUNCTIONS - 16-BIT CPU WITH 4-STAGE PIPELINE. - 50ns INSTRUCTION CYCLE TIME AT 40MHz CPU CLOCK. - MULTIPLY/ACCUMULATE UNIT (MAC) 16 X 16-BIT MULTIPLICATION, 40-BIT ACCUMULATOR - REPEAT UNIT. - ENHANCED BOOLEAN BIT MANIPULATION FACILITIES. - ADDITIONAL INSTRUCTIONS TO SUPPORT HLL AND OPERATING SYSTEMS. - SINGLE-CYCLE CONTEXT SWITCHING SUPPORT. s MEMORY ORGANIZATION - 512K BYTE ON-CHIP FLASH MEMORY SINGLE VOLTAGE WITH ERASE/PROGRAM CONTROLLER. - 100K ERASING/PROGRAMMING CYCLES. - 20 YEAR DATA RETENTION TIME - UP TO 16M BYTE LINEAR ADDRESS SPACE FOR CODE AND DATA (5M BYTE WITH CAN). - 2K BYTE ON-CHIP INTERNAL RAM (IRAM). - 16K BYTE EXTENSION RAM (XRAM). s FAST AND FLEXIBLE BUS - PROGRAMMABLE EXTERNAL BUS CHARACTERIS- TICS FOR DIFFERENT ADDRESS RANGES. - 8-BIT OR 16-BIT EXTERNAL DATA BUS. - MULTIPLEXED OR DEMULTIPLEXED EXTERNAL ADDRESS/DATA BUSES. - FIVE PROGRAMMABLE CHIP-SELECT SIGNALS. - HOLD-ACKNOWLEDGE BUS ARBITRATION SUPPORT. s INTERRUPT - 8-CHANNEL PERIPHERAL EVENT CONTROLLER FOR SINGLE CYCLE, INTERRUPT DRIVEN DATA TRANSFER. - 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH 56 SOURCES, SAMPLE-RATE DOWN TO 25ns. s TWO MULTI-FUNCTIONAL GENERAL PURPOSE TIMER UNITS WITH 5 TIMERS. s TWO 16-CHANNEL CAPTURE/COMPARE UNITS s A/D CONVERTER - 2X16-CHANNEL 10-BIT. - 4.85 µS CONVERSION TIME - ONE TIMER FOR ADC CHANNEL INJECTION s 8-CHANNEL PWM UNIT s SERIAL CHANNELS - SYNCHRONOUS/ASYNC SERIAL CHANNEL - HIGH-SPEED SYNCHRONOUS CHANNEL. s FAIL-SAFE PROTECTION - PROGRAMMABLE WATCHDOG TIMER. - OSCILLATOR WATCHDOG. s TWO CAN 2.0b INTERFACES OPERATING ON ONE OR TWO CAN BUSSES (30 OR 2X15 MESSAGE OBJECTS) s ON-CHIP BOOTSTRAP LOADER s CLOCK GENERATION - ON-CHIP PLL. - DIRECT OR PRESCALED CLOCK INPUT. s UP TO 143 GENERAL PURPOSE I/O LINES - INDIVIDUALLY PROGRAMMABLE AS INPUT, OUT- PUT OR SPECIAL FUNCTION. - PROGRAMMABLE THRESHOLD (HYSTERESIS). s IDLE AND POWER DOWN MODES s MAXIMUM CPU FREQUENCY 40MHz s PACKAGE PBGA 208 BALLS (23mm x 23mm x 1.96 mm - PITCH 1.27mm). s SINGLE VOLTAGE SUPPLY: 5V ±10% (EMBEDDED REGULATOR FOR 3.3 V CORE SUPPLY). s TEMPERATURE RANGE: -40 +125°C PBGA208 (23 x 23 x 1.96 - Pitch 1.27 mm) (Plastic Bold Grid Array) ORDER CODE: ST10F280-JT3 P4.7 CAN2_TxD P4.6 CAN1_TxD P4.5 CAN1_RxD P4.4 CAN2_RxD Port 6 Port 5 Port 3 BRG CPU-Core and MAC Unit Internal RAM Watchdog Interrupt Controller 8 32 16 PEC 16 16 CAN1 Port 7 Port 8 BRG 16 Oscillator 16 16 512K Byte and PLL Flash Memory XTAL1 XTAL2 2K Byte 15 8 8 8 16 3.3V Voltage Regulator 16K Byte XRAM CAN2 XPORT9 16 XPWM 4 XTIMER P7.7 Trigger for ADC 16 XPORT10 16 16 channel injection XADCINJ External connexion 16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM PRODUCT PREVIEW This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice. |
类似零件编号 - ST10F280 |
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类似说明 - ST10F280 |
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