ST10F280 datasheet(49/186 Pages) STMICROELECTRONICS

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ST10F280

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8 - INTERRUPT SYSTEM

The interrupt response time for internal program

execution is from 125ns to 300ns at 40MHz CPU

clock.

The ST10F280 architecture supports several

mechanisms for fast and flexible response to

service requests that can be generated from

various sources (internal or external) to the

microcontroller. Any of these interrupt requests

can be serviced by the Interrupt Controller or by

the Peripheral Event Controller (PEC).

In contrast to a standard interrupt service where

the current program execution is suspended and a

branch to the interrupt vector table is performed,

just one cycle is ‘stolen’ from the current CPU

activity to perform a PEC service. A PEC service

implies a single Byte or Word data transfer

between any two memory locations with an

additional increment of either the PEC source or

destination pointer. An individual PEC transfer

counter is implicitly decremented for each PEC

service except when performing in the continuous

transfer mode. When this counter reaches zero, a

standard

interrupt

performed

the

corresponding source related vector location.

PEC services are very well suited to perform the

transmission or the reception of blocks of data.

The ST10F280 has 8 PEC channels, each of

them offers such fast interrupt-driven data transfer

capabilities.

An interrupt control register which contains an

interrupt request flag, an interrupt enable flag and

an interrupt priority bitfield is dedicated to each

existing interrupt source. Thanks to its related

of sixteen interrupt priority levels. Once starting to

be processed by the CPU, an interrupt service

can only be interrupted by a higher prioritized

service

request.

For

the

standard

interrupt

processing, each of the possible interrupt sources

has a dedicated vector location.

Software interrupts are supported by means of the

‘TRAP’

instruction

combination

with

individual trap (interrupt) number.

8.1 - External Interrupts

Fast external interrupt inputs are provided to

service external interrupts with high precision

requirements. These fast interrupt inputs feature

programmable edge detection (rising edge, falling

edge or both edges).

Fast external interrupts may also have interrupt

sources selected from other peripherals; for

example the CANx controller receive signal

(CANx_RxD) can be used to interrupt the system.

This new function is controlled using the ‘External

Interrupt Source Selection’ register EXISEL.

EXISEL (F1DAh / EDh)

ESFR

Reset Value: 0000h

9876543210

EXI7SS

EXI6SS

EXI5SS

EXI4SS

EXI3SS

EXI2SS

EXI1SS

EXI0SS

EXIxSS

External Interrupt x Source Selection (x=7...0)

‘00’: Input from associated Port 2 pin.

‘01’: Input from “alternate source”.

‘10’: Input from Port 2 pin ORed with “alternate source”.

‘11’: Input from Port 2 pin ANDed with “alternate source”.

EXIxSS

Port 2 pin

Alternate Source

P2.8

CAN1_RxD

P2.9

CAN2_RxD

2...7

P2.10...15

Not used (zero)

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