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AT89LP51 数据表(PDF) 64 Page - ATMEL Corporation

部件名 AT89LP51
功能描述  8-bit Microcontroller with 4K/8K Bytes In-System Programmable Flash
PDF  113 Pages
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制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

AT89LP51 数据表(HTML) 64 Page - ATMEL Corporation

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64
3709C–MICRO–5/11
AT89LP51/52 - Preliminary
state of the clock when not currently transmitting/receiving. The SMOD1 bit determines if the
output data is stable for both edges of the clock, or just one.
In Two-Wire configuration Mode 0 may be used as a hardware accelerator for software emula-
tion of serial interfaces such as a half-duplex Serial Peripheral Interface (SPI) master in mode
(0,0) or (1,1) or a Two-Wire Interface (TWI) in master mode. An example of Mode 0 emulating a
TWI master device is shown in Figure 14-2. In this example, the start, stop, and acknowledge
are handled in software while the byte transmission is done in hardware. Falling/rising edges on
TXD are created by setting/clearing SM2. Rising/falling edges on RXD are forced by set-
ting/clearing the P3.0 register bit. SM2 and P3.0 must be 1 while the byte is being transferred.
Figure 14-1. Mode 0 Waveforms (Two-Wire)
Figure 14-2. UART Mode 0 TWI Emulation (SMOD1 = 1)
Table 14-5.
Mode 0 Clock and Data Modes
SM2
SMOD1
Clock Idle
Data Changes
Data Sampled
0
0
High
While clock is high
Positive edge of clock
0
1
High
Negative edge of clock
Positive edge of clock
1
0
Low
While clock is low
Negative edge of clock
1
1
Low
Negative edge of clock
Positive edge of clock
7
RXD (TX)
TXD
6
5
4
3
2
1
0
RXD (RX)
01234567
7
RXD (TX)
TXD
6
5
4
3
2
1
0
RXD (RX)
01234567
7
RXD (TX)
TXD
6
5
4
3
2
1
0
RXD (RX)
01234567
7
RXD (TX)
TXD
6
5
4
3
2
1
0
RXD (RX)
01234567
SMOD1 = 0
SM2 = 0
SMOD1 = 1
SM2 = 0
SMOD1 = 0
SM2 = 1
SMOD1 = 1
SM2 = 1
7
(SDA) RXD
(SCL) TXD
6
5
4
3
2
1
0
ACK
SM2
P3.0
Write to SBUF
TI
Sample ACK



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