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AT89LP51 数据表(PDF) 33 Page - ATMEL Corporation |
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AT89LP51 数据表(HTML) 33 Page - ATMEL Corporation |
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33 / 113 page ![]() 33 3709C–MICRO–5/11 AT89LP51/52 - Preliminary 7.2 Brown-out Reset The AT89LP51/52 has an on-chip Brown-out Detection (BOD) circuit for monitoring the V DD level during operation by comparing it to a fixed trigger level. The trigger level V BOD for the BOD is nominally 2.0V. The purpose of the BOD is to ensure that if V DD fails or dips while executing at speed, the system will gracefully enter reset without the possibility of errors induced by incorrect execution. A BOD sequence is shown in Figure 7-2. When V DD decreases to a value below the trigger level V BOD, the internal reset is immediately activated. When VDD increases above the trigger level plus about 200 mV of hysteresis, the start-up timer releases the internal reset after the specified time-out period has expired (Table 7-1). Figure 7-2. Brown-out Detector Reset The AT89LP51/52 allows for a wide V DD operating range. The on-chip BOD may not be suffi- cient to prevent incorrect execution if V BOD is lower than the minimum required VDD range, such as when a 5.0V supply is coupled with high frequency operation. In such cases an external Brown-out Reset circuit connected to the RST pin may be required. 7.3 External Reset The RST pin of the AT89LP51/52 can function as either an active-low reset input or as an active- high reset input. The polarity of the RST pin is selectable using the POL pin (formerly EA). When POL is high the RST pin is active high with an on-chip pull-down resistor tied to GND. When POL is low the RST pin is active low with an on-chip pull-up resistor tied to V DD. The RST pin structure is shown in Figure 7-3. In Compatibility mode the reset pin is sampled every six clock cycles and must be held active for at least twelve clock cycles to trigger the internal reset. In Fast mode the reset pin is sampled every clock cycle and must be held active for at least two clock cycles to trigger the internal reset. Table 7-1. Start-up Timer Settings SUT Fuse 1 SUT Fuse 0 Clock Source t SUT (± 5%) µs 00 Internal RC/External Clock 16 Crystal Oscillator 1024 01 Internal RC/External Clock 512 Crystal Oscillator 2048 10 Internal RC/External Clock 1024 Crystal Oscillator 4096 11 Internal RC/External Clock 4096 Crystal Oscillator 16384 VDD Time-out VPOR Internal Reset tSUT VBOD |
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