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AT89LP51 数据表(PDF) 40 Page - ATMEL Corporation |
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AT89LP51 数据表(HTML) 40 Page - ATMEL Corporation |
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40 / 113 page  40 3709C–MICRO–5/11 AT89LP51/52 - Preliminary Table 9-2. IE – Interrupt Enable Register IE = A8H Reset Value = 0000 0000B Bit Addressable EA – ET2 ES ET1 EX1 ET0 EX0 Bit 7 6 543 21 0 Symbol Function EA Global enable/disable. All interrupts are disabled when EA = 0. When EA = 1, each interrupt source is enabled/disabled by setting /clearing its own enable bit. ET2 Timer 2 Interrupt Enable ESSerial Port Interrupt Enable ET1 Timer 1 Interrupt Enable EX1 External Interrupt 1 Enable ET0 Timer 0 Interrupt Enable EX0 External Interrupt 0 Enable Table 9-3. IP – Interrupt Priority Register IP = B8H Reset Value = 0000 0000B Bit Addressable –– PT2 PS PT1 PX1 PT0 PX0 Bit 7 6 543 21 0 Symbol Function PT2 Timer 2 Interrupt Priority Low PSSerial Port Interrupt Priority Low PT1 Timer 1 Interrupt Priority Low PX1 External Interrupt 1 Priority Low PT0 Timer 0 Interrupt Priority Low PX0 External Interrupt 0 Priority Low Table 9-4. IPH – Interrupt Priority High Register IPH = B7H Reset Value = 0000 0000B Not Bit Addressable –– PT2H PSH PT1H PX1H PT0H PX0H Bit 7 6 543 21 0 Symbol Function PT2H Timer 2 Interrupt Priority High PSH Serial Port Interrupt Priority High PT1H Timer 1 Interrupt Priority High PX1H External Interrupt 1 Priority High PT0H Timer 0 Interrupt Priority High PX0H External Interrupt 0 Priority High |
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