TNETX15VE datasheet(24/113 Pages) TI1

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TNETX15VE

VLAN-ENGINE ADDRESS-LOOKUP DEVICE

SPWS028B – APRIL 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

mode-control status register, control at 0x08–0x09 (DIO) (continued)

BIT

NAME

FUNCTION

RESET

Reset. Writing a 1 to RESET places the TNETX15VE in a hardware reset state. This function sets all internal

logic operations to a known state, and clears all registers (except for control). (All data from the lookup table

is lost.) This bit is not automatically loaded from the EEPROM. If EEPROM automatic loading fails, then the

RESET bit is set to 1. This bit must be cleared by the host for the part to exit the reset state.

LOAD

Load system. Writing a 1 to LOAD starts the automatic loading of registers from the attached EEPROM. This

bit is not automatically loaded from the EEPROM. The EEPROM automatic loader clears this bit to 0 (writing

0 to this bit has no effect). This is another way to initialize registers besides the auto-load (if EEPROM

present) after reset.

START

Start system. Writing a 1 to START causes the TNETX15VE to begin operation. While the SRAM tables are

initialized, no address checking is performed. (Writing a 0 to this bit has no effect.)

INITD

RAM-initialization-done signal. INITD becomes high when the lookup table SRAM is initialized. The

TNETX15VE begins learning/matching addresses after this signal goes high. This is a read-only bit. Expect

this to take 40

µs (internal RAM) + 40 ns × RAMsize.

NEEPM

No external EEPROM. NEEPM indicates when an internal EEPROM is detected. If this bit is 1, no EEPROM

is present, or the TNETX15VE is unable to detect it. If this bit is set to 0, an EEPROM is detected. This is

a read-only bit.

NAUTO†

NOT automatically add-address mode select. NAUTO selects the manner in which addresses are added

to the lookup table. In NAUTO mode, the aging logic operation is disabled. It is management’s responsibility

to manage the lookup table in this mode.

• When set to 1, the TNETX15VE adds addresses only to the lookup table when a DIO ADD command

is given to it.

• When set to 0, the TNETX15VE automatically adds unknown addresses to its lookup table.

9–8

Reserved

Writes to these locations are ignored and read as 0.

NIOB

Not-in-order broadcast coding. NIOB must be set to 0. The obsolete mode requested by setting this bit to

1 does not properly support multicast, VLAN, or spanning tree. NIOB must be matched by the

TNETX3150/TNETX3150A mode bit that is inverted (IOBMOD = 1) from the TNETX15VE mode bit.

Reserved

Writes to these locations are ignored and read as 0.

NCRC†

No CRC check. NCRC enables/disables the add-on-only-good CRC function.

• When set to 1, the TNETX15VE adds frames immediately after the source address is found on the

DRAM bus. A good CRC is not required to add the source address to the table.

• When set to 0, the TNETX15VE waits until the EOB/EOF and a good CRC indication before adding

addresses.

MIRR

Mirror-port mode. MIRR enables port-mirroring capabilities for the TNETX15VE. The port to be mirrored is

written in the mirrorport register.

• When set to 1, all frames received on this port or sent to this port are copied to the port specified in

the UPLINKport register.

• When set to 0, the TNETX15VE does not perform port mirroring.

3–0

Reserved

Writes to these locations are ignored and read as 0.

† These signals should not be allowed to change state after the TNETX15VE begins operation (by writing a 1 to START).

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