TNETX15VE datasheet(32/113 Pages) TI1

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TNETX15VE

VLAN-ENGINE ADDRESS-LOOKUP DEVICE

SPWS028B – APRIL 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

SRAM address register, RAMaddr at 0x20–0x22 (DIO)

The RAMaddr register is used with the RAMdata (at 0x24, 0x25) register to access the TNETX15VE internal

or external SRAM. The SRAM accessed (internal or external) is selected through the RSEL bit.

BYTE 2

BYTE 1

BYTE 0

BIT

INC

Reserved

RSEL

RAM ADD

Initial Values After Reset

BIT

NAME

FUNCTION

INC

Address auto-increment. When INC is 1, this increments the RAM ADD field to access the next location in

the SRAM. The address is incremented by one after every time a read or write is performed on the

most-significant byte of the RAMdata register.

22, 21

Reserved

Writes to this location are ignored and read as 0.

RSEL

SRAM access select. RSEL selects whether the SRAM to be accessed is the internal or the external SRAM.

•

If RSEL is 1, accesses are to the internal SRAM.

•

If RSEL is 0, accesses are to the external SRAM.

19–0

RAM ADD

RAM address. This 21-bit field holds the address of the SRAM location, which is read or written. The data

that is to be read or written is placed in the RAMdata register. The internal SRAM is 4K

× 16 in size. The

unused RAM ADD bits are 0 when posting an address for either internal or external access. This interface

is read/write at all times except during reset.

manufacturing test register, MANtest at 0x23 (DIO)

This register is reserved for Texas Instruments manufacturing test. It is written to 0x0 for normal operation. All

reset mechanisms leave 0x0 in this register, and it is not loaded from the EEPROM. It is written to only when

the START bit is not set to 1.

It contains mechanisms, for example, that increment all the counters at the same time (or run the aging algorithm

quicker than usual to decrease the time required to test the part at manufacture). Setting any of these bits results

in abnormal operation. To allow improvement to the testing, these functions are subject to change.

SRAM data register, RAMdata at 0x24–0x25 (DIO)

BYTE 1

BYTE 0

BIT

RAM DATA

Data at SRAM (0x000000)

The RAMdata register is used to access the SRAM address held in the RAM ADD field of the RAMaddr register.

This field is 16-bits wide. The SRAM accessed (internal or external) depends on the RSEL bit in the RAMaddr

• Writes to the RAM are executed when the MS byte of the RAMdata register is written to by the host.

When depositing values for transfer to SRAM, write the least-significant byte first.

• Reads are accomplished by reading the data from either byte in the RAMdata register.

• The SRAM address to be accessed should be placed in the RAMaddr register. If the INC bit in the

RAMaddr register is 1, the address to be accessed is increased after each time the most-significant byte

of RAMdata is accessed.

TNETX15VE 数据表(PDF) 32 Page - Texas Instruments

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