TNETX15VE datasheet(55/113 Pages) TI1

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TNETX15VE

VLAN-ENGINE ADDRESS-LOOKUP DEVICE

SPWS028B – APRIL 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

operating logic arbitration (continued)

INIT

LKUP

DEL

ADD

REG

FIND

AGE

Decreasing

Priority

Figure 4. Logic-Operation Priorities

The arbiter grants the bus to the logic operation with the highest priority that is currently requesting the bus. Each

logic operation requests the bus by asserting its request signal. The arbiter assigns the bus to that logic

operation by asserting its grant signal. If no logic operation is requesting the bus, the arbiter grants the bus to

AGE for background-aging operations.

One logic operation can interrupt a lower-priority logic operation to acquire the bus. For example, an LKUP

operation interrupts an ADD operation.

For the case of ADD and DEL (with the same priority), the arbiter grants the bus to the first logic operation that

requests it. It then grants an uninterruptable bus (unless by a LKUP) to that logic operation until that logic

operation is completed. If both ADD and DEL request the bus at the same time, the bus is granted to ADD. This

ensures that ADD is not interrupted by a DEL operation and vice versa. This hierarchy explains why a host

request for access to RAM completes with some variability — there may be higher-priority operations accessing

RAM at that instant.

lookup algorithm

The TNETX15VE uses a table-based lookup algorithm to provide deterministic lookups with less than 248

memory words. The tables are hierarchical and are linked to the lower tables by threads. Each table can thread

to several different tables in the hierarchy. The lowest table in the hierarchy (leaf) does not point to anything and

contains information about the address to be matched.

Each level in the hierarchy is assigned to a specific range of bits in the address. The bits in the range are used

as an offset within the table at each level. If a thread exists at that offset, the TNETX15VE follows that thread.

The TNETX15VE matches an address when it finds a complete thread to a leaf. The thread structure is shown

in Figure 5.

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