TNETX15VE datasheet(60/113 Pages) TI1

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TNETX15VE

VLAN-ENGINE ADDRESS-LOOKUP DEVICE

SPWS028B – APRIL 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

SRAM data storage

internal SRAM allocation

The internal 4K x 16 SRAM is divided into two 2K x 16 units. Data can be fetched from both blocks at the same

time using a common address. The lower addresses in each page are devoted to the FIFO memory structures.

The bus-watcher FIFO stores source addresses of packets for checking to see if that address needs to be added

to the table after the destination address is looked up to route the packet. The NBLCK FIFO primarily stores

the BPDU packet source address and source ports during spanning-tree resolution. Each FIFO uses the

address in both pages to speed storage and retrieval.

Starting with the 0x05E/0x85E pair, information about each address present in the table is stored. This is the

leaf or end of the table structure mentioned in the previous section. The lower address contains the flag and

port coding word (see definition of findport register, 0x12/0x13), and the upper address contains the age of that

address (see definition of

findnodeage register, 0x14/0x15).

The range of 0x5E to 0x7FF gives room for information on 1954 addresses that are stored here. All the

intermediate tables are stored in the external SRAM. Internal RAM is faster, and storing the information about

an address (table leaf) internally allows several operations that conclude an address lookup, such as looking

up the VLANID bits, to be overlapped to ensure completion.

Internal SRAM allocation is shown in Figure 10.

0x000

Address

Upper FIFO Block

Lookup Table –

Age Time-Stamp

0x05D

0x05E

0x05F

0x060

0x7FD

0x7FE

0x7FF

0x800

0x85D

0x85E

0x85F

0x860

0xFFD

0xFFE

0xFFF

Lookup Table –

Flag/Port Coding

Lower FIFO Block

Section

Figure 10. Internal SRAM Allocation

Three bytes of information are needed for each of the port’s FIFO locations. The address-lookup table leaves

are partitioned into two words for each address. The TNETX15VE places the routing codes and age time stamp

in these two words. There are 1954 pairs of words that limit the address table to 1954 nodes.

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