PC87366 datasheet(150/240 Pages) NSC

150 / 240 page

8.0 ACCESS.bus Interface (ACB) (Continued)

150

www.national.com

8.3.4

ACB Control Status Register (ACBCST)

This register configures and controls the ACB functional block. It maintains the current ACB status and controls several ACB

functions. On reset and when the ACB is disabled, the non-reserved bits of ACBCST are cleared.

Location:

Offset 02h

Type:

Varies per bit

Bit

76543210

Name

Reserved

TGSCL

TSDA

GCMTCH

MATCH

BUSY

Reset

0000

Bit

Type

Description

7-6

Reserved

R/W

TGSCL (Toggle SCL Line). Enables toggling the SCL line during error recovery.

0: Clock toggle completed

1: When the SDA line is low, writing 1 to this bit toggles the SCL line for one cycle. Writing 1 to TGSCL

while SDA is high is ignored.

4RO

TSDA (Test SDA Line). This bit reads the current value of the SDA line. It can be used while recovering

from an error condition in which the SDA line is constantly pulled low by an out-of-sync slave. Data written

to this bit is ignored.

3RO

GCMTCH (Global Call Match)

0: Start Condition or repeated Start and a Stop Condition (including illegal Start or Stop Condition)

1: In slave mode, ACBCTL1.GCMEN is set and the address byte (the ﬁrst byte transferred after a Start

Condition) is 00h.

2RO

MATCH (Address Match)

0: Start Condition or repeated Start and a Stop Condition (including illegal Start or Stop Condition)

1: ACBADDR.SAEN is set and the ﬁrst 7 bits of the address byte (the ﬁrst byte transferred after a Start

Condition) match the 7-bit address in the ACBADDR register.

R/W1C BB (Bus Busy)

0: Writing 1, ACB disabled, or Stop Condition detected

1: Bus active (a low level on either SDA or SCL), or Start Condition

0RO

Busy. This bit should always be written 0. This bit indicates the period between detecting a Start Condition

and completing receipt of the address byte. After this, the ACB is either free or enters slave mode.

0: Completion of any state below or ACB disabled

1: ACB is in one of the following states:

—

Generating a Start Condition

—

Master mode (ACBST.MASTER is set)

—

Slave mode (ACBCST.MATCH or ACBCST.GCMTCH set).

PC87366 数据表(PDF) 150 Page - National Semiconductor (TI)

PC87366 数据表(HTML) 150 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载