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AT89C51ED2-RDTIM 数据表(PDF) 117 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM 数据表(HTML) 117 Page - ATMEL Corporation |
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117 / 137 page ![]() 117 AT89C51RD2/ED2 4235E–8051–04/04 Notes: 1. Operating I CC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns (see Figure 55), VIL = V SS + 0.5V, VIH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal oscillator used (see Figure 52). 2. Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5V, VIH = VCC - 0.5V; XTAL2 N.C; Port 0 = VCC; EA = RST = VSS (see Figure 53). 3. Power-down ICC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC; XTAL2 NC.; RST = VSS (see Fig- ure 54). 4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the V OLS of ALE and Ports 1 and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0 transitions during bus operation. In the worst cases (capacitive loading 100 pF), the noise pulse on the ALE line may exceed 0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary. 5. Typical values are based on a limited number of samples and are not guaranteed. The values listed are at room temperature and 5V. 6. Under steady state (non-transient) conditions, I OL must be externally limited as follows: Maximum I OL per port pin: 10 mA Maximum IOL per 8-bit port: Port 0: 26 mA Ports 1, 2 and 3: 15 mA Maximum total IOL for all output pins: 71 mA If I OL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. VOH1 Output High Voltage, port 0, ALE, PSEN VCC - 0.3 VCC - 0.7 VCC - 1.5 V V V VCC = 5V ± 10% IOH = -200 µA IOH = -3.2 mA IOH = -7.0 mA 0.9 VCC V VCC = 2.7V to 5.5V IOH = -10 µA RRST RST Pull-down Resistor 50 200 (5) 250 k Ω IIL Logical 0 Input Current ports 1, 2, 3, 4 and 5 -50 µAV IN = 0.45V ILI Input Leakage Current ±10 µA 0.45V < VIN < VCC ITL Logical 1 to 0 Transition Current, ports 1, 2, 3, 4 -650 µAV IN = 2.0V C IO Capacitance of I/O Buffer 10 pF FC = 3 MHz T A = 25°C I PD Power-down Current 75 150 µA2.7 < V CC < 5.5V (3) I CCOP Power Supply Current on normal mode 0.4 x Frequency (MHz) + 5 mA V CC = 5.5V (1) I CCIDLE Power Supply Current on idle mode 0.3 x Frequency (MHz) + 5 mA V CC = 5.5V (2) I CCWRITE Power Supply Current on flash or EEdata write 0.8 x Frequency (MHz) + 15 mA V CC = 5.5V t WRITE Flash or EEdata programming time 7 17 ms 2.7 < V CC < 5.5V TA = -40°C to +85°C; VSS = 0V; VCC =2.7V to 5.5V and F = 0 to 40 MHz (both internal and external code execution) VCC =4.5V to 5.5V and F = 0 to 60 MHz (internal code execution only) (Continued) Symbol Parameter Min Typ Max Unit Test Conditions |
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