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AT89C51ED2-RDTIM 数据表(PDF) 118 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM 数据表(HTML) 118 Page - ATMEL Corporation |
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118 / 137 page ![]() 118 AT89C51RD2/ED2 4235E–8051–04/04 Figure 52. ICC Test Condition, Active Mode Figure 53. I CC Test Condition, Idle Mode Figure 54. I CC Test Condition, Power-down Mode Figure 55. Clock Signal Waveform for ICC Tests in Active and Idle Modes EA VCC VCC ICC (NC) CLOCK SIGNAL VCC All other pins are disconnected. RST XTAL2 XTAL1 VSS VCC P0 RST EA XTAL2 XTAL1 V SS VCC V CC I CC (NC) P0 V CC All other pins are disconnected. CLOCK SIGNAL RST EA XTAL2 XTAL1 VSS VCC V CC ICC (NC) P0 VCC All other pins are disconnected. VCC-0.5V 0.45V 0.7V CC 0.2VCC-0.1 TCLCH TCHCL T CLCH = TCHCL = 5ns. |
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