ZUSBOPTSC01ZAC datasheet(103/402 Pages) ZILOG

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PS024604-1005

P R E L I M I N A R Y

PWM Deadband Register

Z8FMC16100 Series Flash MCU

Product Specification

PWM Deadband Register

The PWM Deadband (PWMDB) Register, shown in Table 50, stores the 8-bit PWM dead-

band value. This register determines the number of system clock cycles inserted as dead-

time in complementary output mode. The minimum deadband value is 1.

[1:0]

PRES

PWM Prescaler

The prescaler divides down the PWM input clock (either the system clock or the

PWMIN external input). This field is buffered. Changes to this field take effect at

the next PWM reload event. Reads always return the values from the

temporary holding register.

Divide by 1

Divide by 2

Divide by 4

Divide by 8

Table 50. PWM Dead-Band Register (PWMDB)

BITS

FIELD

PWMDB[7:0]

RESET

01H

R/W

ADDR

F22H

Bit

Position

Value

(H)

Description

[7:0]

PWMDB

PWM Dead band

Sets the PWM dead band period for which both PWM outputs of a

complementary PWM output pair are deasserted.

Note: This register can only be written when PWEN is cleared.

Bit

Position

Value

(H)

Description

ZUSBOPTSC01ZAC 数据表(PDF) 103 Page - Zilog, Inc.

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