ZUSBOPTSC01ZAC datasheet(105/402 Pages) ZILOG

105 / 402 page

PS024604-1005

P R E L I M I N A R Y

PWM Fault Status Register

Z8FMC16100 Series Flash MCU

Product Specification

PWM Fault Status Register

The PWM Fault Status (PWMFSTA) Register, shown in Table 53, provides status of fault

inputs and timer reload.. The fault flags indicate which fault source is active. If a fault

source is masked the flag in this register will not be set if the source is asserted. The

reload flag is set when the timer compare vaules are updated. Clear flags by writing a 1 to

the flag bits. Fault flag bits can only be cleared if the associated fault source has deas-

serted.

Bit

Position

Value

(H)

Description

[7:6]

Reserved

Must be 0.

[5]

DBGMSK

Debug Entry Fault Mask

Entering CPU DEBUG Mode generates a PWM fault.

Entering CPU DEBUG mode does not generate a PWM fault.

[4:3]

Reserved

Must be 0.

[2]

F1MASK

Fault 1 Fault Mask

Fault 1 generates a PWM fault.

Fault 1 does not generate a PWM fault.

[1]

C0MASK

Comparator Fault Mask

Comparator generates a PWM fault.

Comparator does not generate a PWM fault.

[0]

F0MASK

Fault Pin Mask

Fault0 pin generates a PWM fault.

Fault0 pin does not generate a PWM fault.

Note: This register can only be written when PWEN is cleared.

ZUSBOPTSC01ZAC 数据表(PDF) 105 Page - Zilog, Inc.

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