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Z8F021ASH020SC 数据表(PDF) 64 Page - Zilog, Inc.

部件名 Z8F021ASH020SC
功能描述  Z8 Encore XP-R 4K Series High-Performance 8-Bit Microcontrollers
PDF  276 Pages
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制造商  ZILOG [Zilog, Inc.]
网页  http://www.zilog.com
标志 ZILOG - Zilog, Inc.

Z8F021ASH020SC 数据表(HTML) 64 Page - Zilog, Inc.

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PS022815-0206
General-Purpose I/O
Z8 Encore! XP® 4K Series
Product Specification
45
pin during STOP mode do not initiate STOP Mode Recovery.
1 = The Port pin is configured as a STOP Mode Recovery source. Any logic transition on
this pin during STOP mode initiates STOP Mode Recovery.
Port A–D Pull-up Enable Sub-Registers
The Port A–D Pull-up Enable sub-register (Table 25) is accessed through the Port A–D
Control register by writing 06H to the Port A–D Address register. Setting the bits in the
Port A–D Pull-up Enable sub-registers enables a weak internal resistive pull-up on the
specified Port pins.
PPUE[7:0]—Port Pull-up Enabled
0 = The weak pull-up on the Port pin is disabled.
1 = The weak pull-up on the Port pin is enabled.
Port A–D Alternate Function Set 1 Sub-Registers
The Port A–D Alternate Function Set1 sub-register (Table 26) is accessed through the Port
A–D Control register by writing 07H to the Port A–D Address register. The Alternate
Function Set 1 sub-registers selects the alternate function available at a port pin. Alternate
Functions selected by setting or clearing bits of this register are defined in GPIO Alternate
Functions on page 33.
Alternate function selection on port pins must also be enabled as decribed in Port A–D
Alternate Function Sub-Registers on page 42.
PAFS1[7:0]—Port Alternate Function Set 1
0 = Port Alternate Function selected as defined in Tables 15 and 16 in the GPIO Alternate
Table 25. Port A–D Pull-Up Enable Sub-Registers (PxPUE)
BITS
7
6
5
4
3
2
1
0
FIELD
PPUE7
PPUE6
PPUE5
PPUE4
PPUE3
PPUE2
PPUE1
PPUE0
RESET
0
000
00
00
R/W
R/WR/W
R/WR/W
R/WR/W
R/WR/W
ADDR
If 06H in Port A
–D Address Register, accessible through the Port A–D Control Register
Table 26. Port A–D Alternate Function Set 1 Sub-Registers (PxAFS1)
BITS
7
6
5
4
3
2
1
0
FIELD
PAFS17
PAFS16
PAFS15
PAFS14
PAFS13
PAFS12
PAFS11
PAFS10
RESET
00H (all ports of 20/28 pin devices); 04H (Port A of 8-pin device)
R/W
R/WR/W
R/WR/W
R/WR/W
R/WR/W
ADDR
If 07H in Port A–D Address Register, accessible through the Port A–D Control Register
Note:



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