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Z8F021ASH020SC 数据表(PDF) 65 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 65 Page - Zilog, Inc. |
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65 / 276 page ![]() PS022815-0206 General-Purpose I/O Z8 Encore! XP® 4K Series Product Specification 46 Functions section. 1 = Port Alternate Function selected as defined in Tables 15 and 16 in the GPIO Alternate Functions section. Port A–D Alternate Function Set 2 Sub-Registers The Port A–D Alternate Function Set 2 sub-register (Table 27) is accessed through the Port A–D Control register by writing 08H to the Port A–D Address register. The Alternate Function Set 2 sub-registers selects the alternate function available at a port pin. Alternate Functions selected by setting or clearing bits of this register is defined in Table 16 in the section GPIO Alternate Functions on page 33. Alternate function selection on port pins must also be enabled as decribed in Port A–D Alternate Function Sub-Registers on page 42. PAFS2[7:0]—Port Alternate Function Set 2 0 = Port Alternate Function selected as defined in Table 16 GPIO Alternate Functions sec- tion. 1 = Port Alternate Function selected as defined in Table 16 GPIO Alternate Functions sec- tion. Port A–C Input Data Registers Reading from the Port A–C Input Data registers (Table 28) returns the sampled values from the corresponding port pins. The Port A–C Input Data registers are read-only. The value returned for any unused ports is 0. Unused ports include those missing on the 8- and 28-pin packages, as well as those missing on the ADC-enabled 28-pin packages. Table 27. Port A–D Alternate Function Set 2 Sub-Registers (PxAFS2) BITS 7 6 5 4 3 2 1 0 FIELD PAFS27 PAFS26 PAFS25 PAFS24 PAFS23 PAFS22 PAFS21 PAFS20 RESET 00H (all ports of 20/28 pin devices); 04H (Port A of 8-pin device) R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR If 08H in Port A–D Address Register, accessible through the Port A–D Control Register Table 28. Port A–C Input Data Registers (PxIN) BITS 7 6 5 4 3 2 1 0 FIELD PIN7 PIN6 PIN5 PIN4 PIN3 PIN2 PIN1 PIN0 RESET XX XX XXX X R/W R R R RRR RR ADDR FD2H, FD6H, FDAH Note: |
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