Z8F021ASH020SC datasheet(43/276 Pages) ZILOG

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PS022815-0206

Reset, STOP Mode Recovery and Low Voltage Detection

Z8 Encore! XP® 4K Series

Product Specification

Figure 6.Voltage Brown-Out Reset Operation

The POR level is greater than the VBO level by the specified hysteresis value. This

ensures that the device undergoes a Power-On Reset after recovering from a VBO condi-

tion.

Watch-Dog Timer Reset

If the device is in NORMAL or STOP mode, the Watch-Dog Timer can initiate a System

Reset at time-out if the WDT_RES Flash Option Bit is programmed to 1. This is the

unprogrammed state of the WDT_RES Flash Option Bit. If the bit is programmed to 0, it

configures the Watch-Dog Timer to cause an interrupt, not a System Reset, at time-out.

The WDT bit in the Reset Status (RSTSTAT) register is set to signify that the reset was

initiated by the Watch-Dog Timer.

External Reset Input

The RESET pin has a Schmitt-triggered input and an internal pull-up resistor. Once the

RESET pin is asserted for a minimum of four system clock cycles, the device progresses

through the System Reset sequence. Because of the possible asynchronicity of the system

clock and reset signals, the required reset duration may be as short as three clock periods

VCC = 3.3V

VPOR

VVBO

Internal RESET

signal

Program

Execution

Program

Execution

Voltage

Brownout

VCC = 3.3V

System Clock

POR

counter delay

Note: Not to Scale

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