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Z8F021ASH020SC 数据表(PDF) 29 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 29 Page - Zilog, Inc. |
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29 / 276 page ![]() PS022815-0206 Pin Description Z8 Encore! XP® 4K Series Product Specification 10 Analog ANA[7:0] I Analog Port. These signals are used as inputs to the analog-to-digital converter (ADC). VREF I/O Analog-to-digital converter reference voltage input, or buffered output for internal reference. Low-Power Operational Amplifier (LPO) AMPINP/AMPINN I LPO inputs. If enabled, these pins drive the positive and negative amplifier inputs respectively. AMPOUT O LPO output. If enabled, this pin is driven by the on-chip LPO. Oscillators XIN I External Crystal Input. This is the input pin to the crystal oscillator. A crystal can be connected between it and the XOUT pin to form the oscillator. In addition, this pin is used with external RC networks or external clock drivers to provide the system clock. XOUT O External Crystal Output. This pin is the output of the crystal oscillator. A crystal can be connected between it and the XIN pin to form the oscillator. Clock Input CLKIN I Clock Input Signal. This pin may be used to input a TTL-level signal to be used as the system clock. LED Drivers LED O Direct LED drive capability. All port C pins have the capability to drive an LED without any other external components. These pins have programmable drive strengths set by the GPIO block. On-Chip Debugger DBG I/O Debug. This signal is the control and data input and output to and from the On-Chip Debugger. The DBG pin is open-drain and requires an external pull-up resistor to ensure proper operation. Reset RESET I/O RESET. Generates a Reset when asserted (driven Low). Also serves as a reset indicator; the Z8 Encore! XP® forces this pin low when in reset. This pin is open-drain and features an enabled internal pull-up resistor. Power Supply VDD I Digital Power Supply. Table 3. Signal Descriptions (Continued) Signal Mnemonic I/O Description Caution: |
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