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Z8F021ASH020SC 数据表(PDF) 96 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 96 Page - Zilog, Inc. |
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96 / 276 page ![]() PS022815-0206 Timers Z8 Encore! XP® 4K Series Product Specification 77 Reload value. In COMPARE mode, the Timer Reload High and Low Byte registers store the 16-bit Compare value. TRH and TRL—Timer Reload Register High and Low These two bytes form the 16-bit Reload value, {TRH[7:0], TRL[7:0]}. This value sets the maximum count value which initiates a timer reload to 0001H. In Compare mode, these two bytes form the 16-bit Compare value. Timer 0-1 PWM High and Low Byte Registers The Timer 0-1 PWM High and Low Byte (TxPWMH and TxPWML) registers (Tables 53 and Table 54) control Pulse-Width Modulator (PWM) operations. These registers also store the Capture values for the CAPTURE and CAPTURE/COMPARE modes. Table 51. Timer 0–1 Reload High Byte Register (TxRH) BITS 7 6 5 4 3 2 1 0 FIELD TRH RESET 1 111 11 11 R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR F02H, F0AH Table 52. Timer 0–1 Reload Low Byte Register (TxRL) BITS 7 6 5 4 3 2 1 0 FIELD TRL RESET 1 111 11 11 R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR F03H, F0BH Table 53. Timer 0–1 PWM High Byte Register (TxPWMH) BITS 7 6 5 4 3 2 1 0 FIELD PWMH RESET 0 000 00 00 R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR F04H, F0CH |
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