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Z8F021ASH020SC 数据表(PDF) 82 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 82 Page - Zilog, Inc. |
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82 / 276 page ![]() PS022815-0206 Timers Z8 Encore! XP® 4K Series Product Specification 63 Figure 9.Timer Block Diagram Operation The timers are 16-bit up-counters. Minimum time-out delay is set by loading the value 0001H into the Timer Reload High and Low Byte registers and setting the prescale value to 1. Maximum time-out delay is set by loading the value 0000H into the Timer Reload High and Low Byte registers and setting the prescale value to 128. If the Timer reaches FFFF H , the timer rolls over to 0000H and continues counting. Timer Operating Modes The timers can be configured to operate in the following modes: ONE-SHOT Mode In ONE-SHOT mode, the timer counts up to the 16-bit Reload value stored in the Timer Reload High and Low Byte registers. The timer input is the system clock. Upon reaching the Reload value, the timer generates an interrupt and the count value in the Timer High and Low Byte registers is reset to 0001H. The timer is automatically disabled and stops counting. Also, if the Timer Output alternate function is enabled, the Timer Output pin changes state for one system clock cycle (from Low to High or from High to Low) upon timer Reload. If 16-Bit PWM/Compare 16-Bit Counter with Prescaler 16-Bit Reload Register Timer Control Interrupt, PWM, and Timer Output Control Timer Timer Block System Timer Data Block Output Control Bus Clock Input Gate Input Capture Input Timer Interrupt Timer Output Complement |
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