Z8F021ASH020SC datasheet(91/276 Pages) ZILOG

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PS022815-0206

Timers

Z8 Encore! XP® 4K Series

Product Specification

If no Capture event occurs, the timer counts up to the 16-bit Compare value stored in the

Timer Reload High and Low Byte registers. Upon reaching the Reload value, the timer

generates an interrupt, the count value in the Timer High and Low Byte registers is reset to

0001H

and counting resumes. The INPCAP bit in TxCTL0 register is cleared to indicate

the timer interrupt is not caused by an input capture event.

The steps for configuring a timer for CAPTURE RESTART mode and initiating the count

are as follows:

1. Write to the Timer Control register to:

–

Disable the timer

–

Configure the timer for CAPTURE RESTART mode by writing the TMODE bits

in the TxCTL1 register and the TMODEHI bit in TxCTL0 register.

–

Set the prescale value.

–

Set the Capture edge (rising or falling) for the Timer Input.

2. Write to the Timer High and Low Byte registers to set the starting count value

(typically 0001H).

3. Write to the Timer Reload High and Low Byte registers to set the Reload value.

4. Clear the Timer PWM High and Low Byte registers to 0000H. This allows user

software to determine if interrupts were generated by either a capture event or a

reload. If the PWM High and Low Byte registers still contain 0000H after the

interrupt, the interrupt was generated by a Reload.

5. Enable the timer interrupt, if appropriate, and set the timer interrupt priority by writing

to the relevant interrupt registers. By default, the timer interrupt is generated for both

input capture and reload events. If appropriate, configure the timer interrupt to be

generated only at the input capture event or the reload event by setting TICONFIG

field of the TxCTL0 register.

6. Configure the associated GPIO port pin for the Timer Input alternate function.

7. Write to the Timer Control register to enable the timer and initiate counting.

In CAPTURE mode, the elapsed time from timer start to Capture event can be calculated

using the following equation:

COMPARE Mode

In COMPARE mode, the timer counts up to the 16-bit maximum Compare value stored in

the Timer Reload High and Low Byte registers. The timer input is the system clock. Upon

reaching the Compare value, the timer generates an interrupt and counting continues (the

timer value is not reset to 0001H). Also, if the Timer Output alternate function is enabled,

Capture Elapsed Time (s)

Capture Value Start Value

–

() Prescale

System Clock Frequency (Hz)

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