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Z8F021ASH020SC 数据表(PDF) 59 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 59 Page - Zilog, Inc. |
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59 / 276 page ![]() PS022815-0206 General-Purpose I/O Z8 Encore! XP® 4K Series Product Specification 40 GPIO Interrupts Many of the GPIO port pins can be used as interrupt sources. Some port pins can be con- figured to generate an interrupt request on either the rising edge or falling edge of the pin input signal. Other port pin interrupt sources generate an interrupt when any edge occurs (both rising and falling). Refer to the chapter Interrupt Controller on page 50 for more information about interrupts using the GPIO pins. GPIO Control Register Definitions Four registers for each Port provide access to GPIO control, input data, and output data. Table 17 lists these Port registers. Use the Port A–D Address and Control registers together to provide access to sub-registers for Port configuration and control. Port A (Cont) Reserved AFS2[5]: 1 AFS1[5]: 0 Analog Functions* ADC/Comparator Input (P) LPO Output AFS2[5]: 1 AFS1[5]: 1 Table 17. GPIO Port Registers and Sub-Registers Port Register Mnemonic Port Register Name PxADDR Port A–D Address Register (Selects sub-registers) PxCTL Port A–D Control Register (Provides access to sub-registers) PxIN Port A–D Input Data Register PxOUT Port A–D Output Data Register Port Sub-Register Mnemonic Port Register Name PxDD Data Direction PxAF Alternate Function Table 16. Port Alternate Function Mapping (8-Pin Parts) (Continued) Port Pin Mnemonic Alternate Function Description Alternate Function Select Register AFS1 Alternate Function Select Register AFS2 * Analog Functions include ADC inputs, ADC reference, comparator inputs and LPO ports. Note: Also, alternate function selection as described in Port A–D Alternate Function Sub-Registers on page 42 must be enabled. |
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