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Z8F021ASH020SC 数据表(PDF) 182 Page - Zilog, Inc.

部件名 Z8F021ASH020SC
功能描述  Z8 Encore XP-R 4K Series High-Performance 8-Bit Microcontrollers
PDF  276 Pages
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制造商  ZILOG [Zilog, Inc.]
网页  http://www.zilog.com
标志 ZILOG - Zilog, Inc.

Z8F021ASH020SC 数据表(HTML) 182 Page - Zilog, Inc.

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PS022815-0206
Non-Volatile Data Storage
Z8 Encore! XP® 4K Series
Product Specification
163
Non-Volatile Data Storage
Overview
The Z8 Encore! XP® 4K Series devices contain a non-volatile data storage (NVDS) ele-
ment of up to 128 bytes. This memory can perform over 100,000 write cycles.
Operation
The NVDS is implemented by special purpose ZiLOG software stored in areas of program
memory not accessible to the user. These special-purpose routines use the Flash memory
to store the data. The routines incorporate a dynamic addressing scheme to maximize the
write/erase endurance of the Flash.
Different members of the Z8 Encore! XP® 4K Series feature multiple NVDS array sizes.
See Z8 Encore! XP® 4K Series Family Part Selection Guide on page 2 for details.
NVDS Code Interface
Two routines are required to access the NVDS: a write routine and a read routine. Both of
these routines are accessed with a CALL instruction to a pre-defined address outside of the
user-accessible program memory. Both the NVDS address and data are single-byte values.
Because these routines disturb the working register set, user code must ensure that any
required working register values are preserved by pushing them onto the stack or by
changing the working register pointer just prior to NVDS execution.
During both read and write accesses to the NVDS, interrupt service is NOT disabled. Any
interrupts that occur during the NVDS execution must take care not to disturb the working
register and existing stack contents or else the array may become corrupted. Disabling
interrupts before executing NVDS operations is recommended.
Use of the NVDS requires 15 bytes of available stack space. Also, the contents of the
working register set are overwritten.
For correct NVDS operation, the Flash Frequency Registers must be programmed based
on the system clock frequency (See Flash Operation Timing Using the Flash Frequency
Registers on page 140).
Note:



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