| 数据搜索系统,热门电子元器件搜索 |
|
EDBA164B4PR-1DITF-R 数据表(PDF) 102 Page - Micron Technology |
|
|
|||||||||||||||||||||||||||||
EDBA164B4PR-1DITF-R 数据表(HTML) 102 Page - Micron Technology |
|
102 / 152 page ![]() Absolute Maximum Ratings Stresses greater than those listed below may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this document is not implied. Exposure to absolute maximum rating conditions for extended periods may adversely affect reliability. Table 59: Absolute Maximum DC Ratings Parameter Symbol Min Max Unit Notes VDD1 supply voltage relative to VSS VDD1 –0.4 +2.3 V 1 VDD2 supply voltage relative to VSS VDD2 (1.2V) –0.4 +1.6 V 1 VDDQ supply voltage relative to VSSQ VDDQ –0.4 +1.6 V 1, 3 Voltage on any ball relative to VSS VIN, VOUT –0.4 +1.6 V Storage temperature TSTG –55 +125 ˚C 4 Notes: 1. See 1. Voltage Ramp under Power Up. 2. VREFCA 0.6 ≤ VDD2; however, VREFCA may be ≥ VDD2 provided that VREFCA ≤ 300mV. 3. VREFDQ 0.6 ≤ VDDQ; however, VREFDQ may be ≥ VDDQ provided that VREFDQ ≤ 300mV. 4. Storage temperature is the case surface temperature on the center/top side of the de- vice. For measurement conditions, refer to the JESD51-2 standard. Input/Output Capacitance Table 60: Input/Output Capacitance Note 1 applies to all parameters and conditions Parameter Symbol MIN MAX Unit Notes Input capacitance, CK and CK# CL1 1.0 3.0 pF 2 Input capacitance, all other LPDDR2 input only balls CL2 1.0 3.0 pF 2 Input/output capacitance, DQ, DM, DQS, DQS# CI/O 2.0 3.5 pF 2, 3 Input/output capacitance, ZQ CZQ 2.0 3.0 pF 2, 3 Notes: 1. This parameter is not subject to production testing. It is verified by design and character- ization. The capacitance is measured according to JEP147 (procedure for measuring in- put capacitance using a vector network analyzer), with VDD1, VDD2, VDDQ, VSS, and VSSQ applied; all other pins are left floating. 2. These parameters are measured on f = 100 MHz, VOUT = VDDQ2, TA = 25°C. 3. DOUT circuits are disabled. 216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM Absolute Maximum Ratings 09005aef85eb530a 216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN 102 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |