VSC8540RT datasheet(38/87 Pages) MICROCHIP

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VSC8540RT

DS60001603E-page 38

 2022 Microchip Technology Inc. and its subsidiaries

6.2.1

MODE CONTROL

The device register at memory address 0 controls several aspects of the VSC8540RT device functionality. The following

table shows the available bit settings in this register and what they control.

6.2.2

MODE STATUS

The register at address 1 in the device main registers space enables reading the currently enabled mode setting. The

following table shows possible readouts of this register.

TABLE 6-3:

MODE CONTROL, ADDRESS 0 (0X00)

Bit

Name

Access

Description

Default

Software reset

R/W

Self-clearing. Restores all serial management interface (SMI)

registers to default state, except for sticky and super-sticky

bits.

1: Reset asserted.

0: Reset de-asserted. Wait 1 ?s after setting this bit to initiate

another SMI register access.

Loopback

R/W

1: Loopback enabled.

0: Loopback disabled. When loopback is enabled, the device

functions at the current speed setting and with the current

duplex mode setting (bits 6, 8, and 13 of this register).

Forced speed selection LSB R/W

Least significant bit. MSB is bit 6.

00: 10 Mbps

01: 100 Mbps

10: Reserved

11: Reserved

Autonegotiation enable

R/W

1: Autonegotiation enabled.

0: Autonegotiation disabled.

Power-down

R/W

1: Power down enabled.

Isolate

R/W

1: Disable MAC interface outputs and ignore MAC interface

inputs.

Restart autonegotiation

R/W

Self-clearing bit.

1: Restart autonegotiation on media interface.

Duplex

R/W

1: Full-duplex.

0: Half-duplex.

Collision test enable

R/W

1: Collision test enabled.

Forced speed selection

MSB

R/W

Most significant bit. LSB is bit 13.1

00: 10 Mbps

01: 100 Mbps

10: Reserved

11: Reserved

5:0 Reserved

Reserved.

TABLE 6-4:

MODE STATUS, ADDRESS 1 (0X01)

Bit

Name

Access

Description

Default

100BASE-T4 capability

1: 100BASE-T4 capable.

100BASE-TX FDX capability RO

1: 100BASE-TX FDX capable.

100BASE-TX HDX capability RO

1: 100BASE-TX HDX capable.

10BASE-T FDX capability

1: 10BASE-T FDX capable.

10BASE-T HDX capability

1: 10BASE-T HDX capable.

100BASE-T2 FDX capability RO

1: 100BASE-T2 FDX capable.

100BASE-T2 HDX capability RO

1: 100BASE-T2 HDX capable.

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