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VSC8540RT 数据表(PDF) 59 Page - Microchip Technology |
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VSC8540RT 数据表(HTML) 59 Page - Microchip Technology |
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59 / 87 page ![]() 2022 Microchip Technology Inc. and its subsidiaries DS60001603E-page 59 VSC8540RT 6.5.2 GPIO CONTROL 2 The GPIO control 2 register configures the functionality of the COMA_MODE and LED pins. 6.5.3 FAST LINK CONFIGURATION Register 19G in the GPIO register space controls the selection of the source PHY for the fast link failure indication. The following table shows the settings available for the FASTLINK_FAIL pin. 6.5.4 RECOVERED CLOCK CONTROL Register 23G in the extended register space controls the functionality of the recovered clock output signal. TABLE 6-50: GPIO CONTROL 2, ADDRESS 14G (0X0E) Bit Name Access Description Default 15:14 Reserved RO Reserved. 13 COMA_MODE output enable (active low) R/W 1: COMA_MODE pin is an input. 0: COMA_MODE pin is an output. 1 12 COMA_MODE output data R/W Value to output on the COMA_MODE pin when it is configured as an output. 0 11 COMA_MODE input data RO Data read from the COMA_MODE pin. 10 Reserved RO Reserved. 9 Tri-state enable for LEDs R/W 1: Tri-state LED output signals instead of driving them high. This allows the signals to be pulled above VDDIO using an external pull-up resistor. 0: Drive LED bus output signals to high and low val- ues. 1 8:0 Reserved RO Reserved. TABLE 6-51: MAC CONFIGURATION AND FAST LINK REGISTER, ADDRESS 19G (0X13) Bit Name Access Description Default 15:4 Reserved RO Reserved. 3:0 Fast link failure setting R/W 0000: Fast link failure pin enabled. 0001–1110: Reserved. 1111: Output disabled. 0000 TABLE 6-52: RECOVERED CLOCK CONTROL, ADDRESS 23G (0X17) Bit Name Access Description Default 15 Enable RCVRD_CLK R/W 1: Enable recovered clock output. 0: Disable recovered clock output. 0 14:11 Reserved RO Reserved. 10:8 Clock frequency select R/W Select output clock frequency. 000: 25 MHz output clock. 001: 125 MHz output clock. 010: 31.25 MHz output clock. 011–111: Reserved. 000 7:6 Reserved RO Reserved. |
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