VSC8540RT datasheet(76/87 Pages) MICROCHIP

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VSC8540RT

DS60001603E-page 76

 2022 Microchip Technology Inc. and its subsidiaries

The following illustration shows the SOF indication timing.

FIGURE 8-9:

SOF INDICATION TIMING

8.4.12

SERIAL MANAGEMENT INTERFACE

This section contains the AC specifications for the serial management interface (SMI).

Data to clock output skew (at

PHY) TX_SOF_CLK to TX_SOF

tSKEW_TX_SOF 450

850

TABLE 8-29:

SERIAL MANAGEMENT INTERFACE AC CHARACTERISTICS

Parameter

Symbol Minimum Typical

Maximum

Unit

Condition

MDC frequency1

1. For fCLK above 1 MHz, the maximum rise time and fall time is in relation to the frequency of the MDC clock

period. For example, if fCLK is 2 MHz, the maximum clock rise time and fall time is 50 ns.

fCLK

2.5

12.5

MHz

MDC cycle time

tCYC

400

MDC time high

tWH

MDC time low

tWL

Setup to MDC rising

tSU

Hold from MDC ris-

ing

MDC rise time

100

tCYC × 10%1

fCLK <1 MHz

fCLK from 1 MHz to 12.5 MHz

MDC fall time

100

tCYC × 10%1

fCLK <1 MHz

fCLK from 1 MHz to 12.5 MHz

MDC to MDIO valid

tCO

300

Time-dependent on the value of

the external pull-up resistor on

the MDIO pin

TABLE 8-28:

START OF FRAME INDICATION AC CHARACTERISTICS (CONTINUED)

Parameter

Symbol

Minimum

Typical

Maximum

Unit

Condition

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