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VSC8540RT 数据表(PDF) 13 Page - Microchip Technology |
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VSC8540RT 数据表(HTML) 13 Page - Microchip Technology |
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13 / 87 page ![]() 2022 Microchip Technology Inc. and its subsidiaries DS60001603E-page 13 VSC8540RT SMI MDC 48 I VDDMDIO Management data clock. A 0 MHz to 12.5 MHz reference input is used to clock serial MDIO data into and out of the PHY. SMI MDINT 51 O, OD VDDMDIO Management interrupt signal. These pins can be tied together in a wired-OR configuration with only a single pull-up resistor. SMI MDIO 50 I/O VDDMDIO Management data input/output pin. Serial data is written or read form this pin bi-directionally between the PHY and station manager synchronously on the positive edge of MDC. One external pull-up resistor is required at the station manager. TABLE 3-2: PINS BY FUNCTION |
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