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VSC8540RT 数据表(PDF) 15 Page - Microchip Technology

部件名 VSC8540RT
功能描述  Radiation-Tolerant Single Port Fast Ethernet Copper PHY with RGMII/MII/RMII Interfaces
PDF  87 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

VSC8540RT 数据表(HTML) 15 Page - Microchip Technology

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 2022 Microchip Technology Inc. and its subsidiaries
DS60001603E-page 15
VSC8540RT
5.0
FUNCTIONAL DESCRIPTIONS
This section describes the functional aspects of the VSC8540RT device, including available configurations, operational
features, and testing functionality. It also defines the device setup parameters that configure the device for a particular
application.
5.1
Operating Modes
The following table lists the operating modes of the VSC8540RT device.
5.2
MAC Interface
The VSC8540RT device supports RMII version 1.2, RGMII versions 1.3 and 2.0, and MII MAC interfaces at 1.5V, 1.8V,
2.5V, and 3.3V operating voltages. In order to help reduce EMI, the VSC8540RT device also includes edge rate pro-
grammability for the MAC interface signals through register 27E2.7:5.
The recommended values for RS resistor (as shown in Figure 5-1, Figure 5-4, and Figure 5-5) are listed in the following
table.
Refer to the MAC datasheet for the value to use for RT resistor.
5.2.1
RGMII MAC INTERFACE MODE
The VSC8540RT device supports RGMII versions 1.3 and 2.0 (without HSTL modes). The RGMII interface supports
10 Mbps and 100 Mbps speeds, and is used as an interface to a RGMII-compatible MAC. The device is compliant with
the RGMII interface specification when VDDMAC is operating at 2.5V. While the RGMII specification only specifies oper-
ation at 2.5V, the device can also support the RGMII interface at 1.5V, 1.8V, and 3.3V.
FIGURE 5-1:
RGMII MAC INTERFACE
TABLE 5-1:
OPERATING MODES
Operating Mode
Supported Media
RGMII-Cat5
10/100BASE-TX
MII-Cat5
10/100BASE-TX
RMII-Cat5
10/100BASE-TX
TABLE 5-2:
RECOMMENDED VALUES FOR RS (± 5%)
VDDMAC Value
RS Value
1.5 V
27
1.8V
33
2.5V
39
3.3V
39
RGMII MAC
TXD[3]
TXD[2]
TXD[1]
TXD[0]
RXD[3]
RXD[2]
RXD[1]
RXD[0]
TX_CLK
TX_CTL
RX_CLK
RX_CTL
SimpliPHY
TXD[3]
TXD[2]
TXD[1]
TXD[0]
RXD[3]
RXD[2]
RXD[1]
RXD[0]
GTX_CLK
TX_CTL
RX_CLK
RX_CTL
R
T
R
T
R
T
R
T
R
T
R
T
R
S
R
S
R
S
R
S
R
S
R
S



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