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VSC8540RT 数据表(PDF) 54 Page - Microchip Technology

部件名 VSC8540RT
功能描述  Radiation-Tolerant Single Port Fast Ethernet Copper PHY with RGMII/MII/RMII Interfaces
PDF  87 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

VSC8540RT 数据表(HTML) 54 Page - Microchip Technology

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VSC8540RT
DS60001603E-page 54
2022 Microchip Technology Inc. and its subsidiaries
6.4.2
EEE CONTROL
The register at address 17E2 consists of the bits that provide additional control over the chip behavior in energy-efficient
Ethernet (IEEE 802.3az-2010) mode for debug.
6.4.3
RGMII CONTROL
The following table shows the register settings for the RGMII controls at address 20E2.
TABLE 6-37:
EEE CONTROL, ADDRESS 17E2 (0X11)
Bit
Name
Access
Description
Default
15
Enable 10BASE-Te
R/W
Sticky bit.
Enable energy efficient (IEEE 802.3az-2010)
10BASE-Te operating mode.
0
14:12 Reserved
RO
Reserved.
11:10
Invert LED polarity
R/W
Sticky bit.
Invert polarity of LED signals. Default is to drive
an active low signal on the LED pins. For more
information, see Section 5.11.2, "Basic Serial
LED Mode".
00
9
Reserved
RO
Reserved.
8
Link status
RO
1: Link is up.
0
7
Reserved
RO
Reserved.
6
100BASE-TX EEE
enable
RO
1: EEE is enabled for 100BASE-TX.
0
5
Reserved
RO
Reserved.
4
Force transmit LPI1
1. 17E2 bits 4:0 are for debugging purposes only, not for operational use.
R/W
Sticky bit.
1: Enable the EPG to transmit LPI on the MDI,
ignore data from the MAC interface.
0: Transmit idles being received from the MAC.
0
3
Inhibit 100BASE-TX
transmit EEE LPI
R/W
Sticky bit.
1: Disable transmission of EEE LPI on transmit
path MDI in 100BASE-TX mode when receiving
LPI from MAC.
0
2
Inhibit 100BASE-TX
receive EEE LPI
R/W
Sticky bit.
1: Disable transmission of EEE LPI on receive
path MAC interface in 100BASE-TX mode when
receiving LPI from the MDI.
0
1:0
Reserved
RO
Reserved.
TABLE 6-38:
RGMII CONTROL, ADDRESS 20E2 (0X14)
Bit
Name
Access
Description
Default
15
FLF2 enable
R/W
Fast Link Failure 2 indication enable.
0: Disabled.
1: Enabled.
0
14:13
Reserved
RO
Reserved.
12
SOF Enable
R/W
Sticky bit.
0: SOF indication disabled.
1: SOF indication enabled.
0
11:8
Reserved
RO
Reserved.



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