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VSC8540RT 数据表(PDF) 39 Page - Microchip Technology

部件名 VSC8540RT
功能描述  Radiation-Tolerant Single Port Fast Ethernet Copper PHY with RGMII/MII/RMII Interfaces
PDF  87 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

VSC8540RT 数据表(HTML) 39 Page - Microchip Technology

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2022 Microchip Technology Inc. and its subsidiaries
DS60001603E-page 39
VSC8540RT
6.2.3
DEVICE IDENTIFICATION
All 16 bits in both register 2 and register 3 in the VSC8540RT device is used to provide information associated with
aspects of the device identification. The following tables list the expected readouts.
6.2.4
AUTO-NEGOTIATION ADVERTISEMENT
The bits in address 4 in the main registers space control the ability to notify other devices of the status of its auto-nego-
tiation feature. The following table shows the available settings and readouts.
8
Extended status enable
RO
1: Extended status information present in register
15.
1
7
Reserved
RO
Reserved.
6
Preamble suppression capa-
bility
RO
1: MF preamble can be suppressed.
0: MF required.
1
5
Auto-negotiation complete
RO
1: Auto-negotiation complete.
0
4
Remote fault
RO
Latches high.
1: Far-end fault detected.
0
3
Auto-negotiation capability
RO
1: Auto-negotiation capable.
1
2
Link status
RO
Latches low.
1: Link is up.
0
1
Jabber detect
RO
Latches high.
1: Jabber condition detected.
0
0
Extended capability
RO
1: Extended register capable.
1
TABLE 6-5:
IDENTIFIER 1, ADDRESS 2 (0X02)
Bit
Name
Access
Description
Default
15:0 Organizationally unique identifier (OUI) RO
OUI most significant bits (3:18)
0×0007
TABLE 6-6:
IDENTIFIER 2, ADDRESS 3 (0X03)
Bit
Name
Access
Description
Default
15:10 OUI
RO
OUI least significant bits (19:24)
000001
9:4
Microchip model number
RO
VSC8540RT
110110
3:0
Device revision number
RO
Revision C
0010
TABLE 6-7:
DEVICE AUTO-NEGOTIATION ADVERTISEMENT, ADDRESS 4 (0X04)
Bit
Name
Access
Description
Default
15
Next page transmission request R/W
1: Request enabled
0
14
Reserved
RO
Reserved
13
Transmit remote fault
R/W
1: Enabled
0
12
Reserved
RO
Reserved
11
Advertise asymmetric pause
R/W
1: Advertises asymmetric pause
0
10
Advertise symmetric pause
R/W
1: Advertises symmetric pause
0
9
Advertise100BASE-T4
R/W
1: Advertises 100BASE-T4
0
8
Advertise100BASE-TX FDX
R/W
1: Advertise 100BASE-TX FDX
1
7
Advertise100BASE-TX HDX
R/W
1: Advertises 100BASE-TX HDX 1
6
Advertise10BASE-T FDX
R/W
1: Advertises 10BASE-T FDX
1
5
Advertise10BASE-T HDX
R/W
1: Advertises 10BASE-T HDX
1
4:0 Advertise selector
R/W
00001
TABLE 6-4:
MODE STATUS, ADDRESS 1 (0X01) (CONTINUED)
Bit
Name
Access
Description
Default



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