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LSM6DST 数据表(PDF) 77 Page - STMicroelectronics |
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LSM6DST 数据表(HTML) 77 Page - STMicroelectronics |
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77 / 180 page  DocID033525 Rev 2 77/180 LSM6DST Register description 180 9.9 INT1_CTRL (0Dh) INT1 pin control register (r/w) Each bit in this register enables a signal to be carried over INT1 when the MIPI I3CSM dynamic address is not assigned (I²C or SPI is used). Some bits can be also used to trigger an IBI (In-Band Interrupt) when the MIPI I3CSM interface is used. The output of the pin will be the OR combination of the signals selected here and in MD1_CFG (5Eh). Table 40. INT1_CTRL register description Table 39. INT1_CTRL register DEN_ DRDY_ flag INT1_CNT _BDR INT1_ FIFO _FULL INT1_ FIFO_ OVR INT1_ FIFO_TH INT1_ BOOT INT1_ DRDY_G INT1_ DRDY_XL DEN_DRDY_flag Sends DEN_DRDY (DEN stamped on Sensor Data flag) to INT1 pin INT1_CNT_BDR Enables COUNTER_BDR_IA interrupt on INT1 INT1_FIFO_FULL Enables FIFO full flag interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_FIFO_OVR Enables FIFO overrun interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_FIFO_TH Enables FIFO threshold interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_BOOT Enables boot status on INT1 pin INT1_DRDY_G Enables gyroscope data-ready interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_DRDY_XL Enables accelerometer data-ready interrupt on INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. |
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