LSM6DST datasheet(81/180 Pages) STMICROELECTRONICS

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DocID033525 Rev 2

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LSM6DST

180

9.14

CTRL3_C (12h)

Control register 3 (r/w)

Table 52. CTRL3_C register description

Table 51. CTRL3_C register

BOOT

BDU

H_LACTIVE

PP_OD

SIM

IF_INC

0(1)

1. This bit must be set to '0' for the correct operation of the device.

SW_RESET

BOOT

Reboots memory content. Default value: 0

(0: normal mode; 1: reboot memory content)

This bit is automatically cleared.

BDU

Block Data Update. Default value: 0

(0: continuous update;

1: output registers are not updated until MSB and LSB have been read)

H_LACTIVE

Interrupt activation level. Default value: 0

(0: interrupt output pins active high; 1: interrupt output pins active low)

PP_OD

Push-pull/open-drain selection on INT1 and INT2 pins. Default value: 0

(0: push-pull mode; 1: open-drain mode)

SIM

SPI Serial Interface Mode selection. Default value: 0

(0: 4-wire interface; 1: 3-wire interface)

IF_INC

serial interface (I²C or SPI). Default value: 1

(0: disabled; 1: enabled)

SW_RESET

Software reset. Default value: 0

(0: normal mode; 1: reset device)

This bit is automatically cleared.

LSM6DST 数据表(PDF) 81 Page - STMicroelectronics

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