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ADE5166 数据表(PDF) 114 Page - Analog Devices |
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ADE5166 数据表(HTML) 114 Page - Analog Devices |
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114 / 148 page  ADE5166/ADE5169/ADE5566/ADE5569 Preliminary Technical Data Rev. PrB | Page 114 of 148 Table 119. RTC Configuration SFR (TIMECON, 0xA1) Bit Mnemonic Default Description 7 Reserved N/A Reserved. 6 ALFLAG 0 Alarm flag. This bit is set when the RTC registers match the enabled alarm registers. It can be cleared by the user to indicate that the alarm has been serviced. 5 to 4 ITS[1:0] 0 INTVAL timebase select bits. ITS[1:0] Timebase 00 1/128 sec 01 Second 10 Minute 11 Hour 3 SIT 0 Interval timer one-time alarm. SIT Result 0 The ALARM flag is set after INTVAL counts and then another interval count starts. 1 The ALARM flag is set after one time interval. 2 ITFLAG 0 Interval timer flag. This bit is set when the configured time interval has elapsed. It can be cleared by the user to indicate that the alarm event has been serviced. 1 ITEN 0 Interval timer enable. ITEN Result 0 The interval timer is disabled. The 8-bit interval timer counter is reset. 1 Set this bit to enable the interval timer. 0 Unused N/A Table 120. RTC Configuration 2 SFR (TIMECON2, 0xA2) Bit Mnemonic Default Description 7 to 5 Reserved N/A Reserved. 4 ALDAT_EN 0 Alarm date enable. When this bit is set, the data in the AL_DATE register is compared to the data in the RTC DATE register. If the two values match and any other enabled RTC alarms also match, the ALFLAG is set. If enabled, an RTC interrupt occurs. 3 ALDAY_EN 0 Alarm day enable. When this bit is set, the data in the AL_DAY register is compared to the data in the RTC DAY register. If the two values match and any other enabled RTC alarms also match, the ALFLAG is set. If enabled, an RTC interrupt occurs. 2 ALHR_EN 0 Alarm hour enable. When this bit is set, the data in the AL_HOUR register is compared to the data in the RTC HOUR register. If the two values match and any other enabled RTC alarms also match, the ALFLAG is set. If enabled, an RTC interrupt occurs. 1 ALMIN_EN 0 Alarm minute enable. When set, the data in the AL_MIN register is compared to the data in the RTC MIN register. If the two values match and any other enabled RTC alarms also match, the ALFLAG is set. If enabled, an RTC interrupt occurs. 0 ALSEC_EN 0 Alarm second enable. When this bit is set, the data in the AL_SEC register is compared to the data in the RTC SEC register. If the two values match and any other enabled RTC alarms also match, the ALFLAG is set. If enabled, an RTC interrupt occurs. |
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